mirror of
https://github.com/esp-rs/esp-hal.git
synced 2025-10-02 14:44:42 +00:00
Support ESP32-C2 with 26MHz Xtal
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cfe83827cf
commit
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@ -63,6 +63,9 @@ esp32c3 = ["esp32c3/rt", "riscv"]
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esp32s2 = ["esp32s2/rt", "xtensa", "xtensa-lx/esp32s2", "xtensa-lx-rt/esp32s2", "esp-synopsys-usb-otg", "usb-device"]
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esp32s2 = ["esp32s2/rt", "xtensa", "xtensa-lx/esp32s2", "xtensa-lx-rt/esp32s2", "esp-synopsys-usb-otg", "usb-device"]
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esp32s3 = ["esp32s3/rt", "xtensa", "xtensa-lx/esp32s3", "xtensa-lx-rt/esp32s3", "lock_api", "esp-synopsys-usb-otg", "usb-device"]
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esp32s3 = ["esp32s3/rt", "xtensa", "xtensa-lx/esp32s3", "xtensa-lx-rt/esp32s3", "lock_api", "esp-synopsys-usb-otg", "usb-device"]
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esp32c2_40mhz = []
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esp32c2_26mhz = []
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# Implement the `embedded-hal==1.0.0-alpha.x` traits
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# Implement the `embedded-hal==1.0.0-alpha.x` traits
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eh1 = ["embedded-hal-1", "embedded-hal-nb"]
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eh1 = ["embedded-hal-1", "embedded-hal-nb"]
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@ -12,6 +12,13 @@ fn main() {
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n => panic!("Exactly 1 chip must be enabled via its Cargo feature, {n} provided"),
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n => panic!("Exactly 1 chip must be enabled via its Cargo feature, {n} provided"),
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}
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}
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if cfg!(feature = "esp32c2")
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&& cfg!(feature = "esp32c2_40mhz")
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&& cfg!(feature = "esp32c2_26mhz")
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{
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panic!("Only one xtal speed feature can be selected");
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}
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// Define all required configuration symbols for the enabled chip.
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// Define all required configuration symbols for the enabled chip.
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//
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//
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// When adding a new device, at the bare minimum the following symbols MUST be
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// When adding a new device, at the bare minimum the following symbols MUST be
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@ -227,7 +227,8 @@ impl ClockControl {
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/// Use what is considered the default settings after boot.
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/// Use what is considered the default settings after boot.
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#[allow(unused)]
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#[allow(unused)]
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pub fn boot_defaults(clock_control: SystemClockControl) -> ClockControl {
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pub fn boot_defaults(clock_control: SystemClockControl) -> ClockControl {
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ClockControl {
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#[cfg(feature = "esp32c2_40mhz")]
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return ClockControl {
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_private: (),
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_private: (),
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desired_rates: RawClocks {
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desired_rates: RawClocks {
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cpu_clock: HertzU32::MHz(80),
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cpu_clock: HertzU32::MHz(80),
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@ -235,14 +236,28 @@ impl ClockControl {
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xtal_clock: HertzU32::MHz(40),
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xtal_clock: HertzU32::MHz(40),
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i2c_clock: HertzU32::MHz(40),
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i2c_clock: HertzU32::MHz(40),
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},
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},
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}
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};
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#[cfg(feature = "esp32c2_26mhz")]
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return ClockControl {
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_private: (),
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desired_rates: RawClocks {
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cpu_clock: HertzU32::MHz(80),
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apb_clock: HertzU32::MHz(40),
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xtal_clock: HertzU32::MHz(26),
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i2c_clock: HertzU32::MHz(26),
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},
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};
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}
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}
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/// Configure the CPU clock speed.
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/// Configure the CPU clock speed.
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#[allow(unused)]
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#[allow(unused)]
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pub fn configure(clock_control: SystemClockControl, cpu_clock_speed: CpuClock) -> ClockControl {
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pub fn configure(clock_control: SystemClockControl, cpu_clock_speed: CpuClock) -> ClockControl {
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let apb_freq;
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let apb_freq;
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#[cfg(feature = "esp32c2_40mhz")]
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let xtal_freq = XtalClock::RtcXtalFreq40M;
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let xtal_freq = XtalClock::RtcXtalFreq40M;
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#[cfg(feature = "esp32c2_26mhz")]
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let xtal_freq = XtalClock::RtcXtalFreq26M;
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let pll_freq = PllClock::Pll480MHz;
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let pll_freq = PllClock::Pll480MHz;
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if cpu_clock_speed.mhz() <= xtal_freq.mhz() {
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if cpu_clock_speed.mhz() <= xtal_freq.mhz() {
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@ -59,10 +59,16 @@ pub(crate) fn init() {
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}
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}
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pub(crate) fn configure_clock() {
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pub(crate) fn configure_clock() {
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#[cfg(feature = "esp32c2_40mhz")]
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assert!(matches!(
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assert!(matches!(
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RtcClock::get_xtal_freq(),
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RtcClock::get_xtal_freq(),
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XtalClock::RtcXtalFreq40M
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XtalClock::RtcXtalFreq40M
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));
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));
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#[cfg(feature = "esp32c2_26mhz")]
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assert!(
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matches!(RtcClock::get_xtal_freq(), XtalClock::RtcXtalFreq26M),
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"Did you flash the right bootloader configured for 26MHz xtal?"
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);
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RtcClock::set_fast_freq(RtcFastClock::RtcFastClock8m);
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RtcClock::set_fast_freq(RtcFastClock::RtcFastClock8m);
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@ -1,5 +1,5 @@
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[target.xtensa-esp32-none-elf]
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[target.xtensa-esp32-none-elf]
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runner = "espflash --monitor"
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runner = "espflash flash --monitor"
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[build]
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[build]
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rustflags = [
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rustflags = [
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@ -1,12 +1,12 @@
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[target.riscv32imc-unknown-none-elf]
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[target.riscv32imc-unknown-none-elf]
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runner = "espflash --monitor"
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runner = "espflash flash --monitor"
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rustflags = [
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rustflags = [
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"-C", "link-arg=-Tlinkall.x"
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"-C", "link-arg=-Tlinkall.x"
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]
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]
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# for testing: you can specify this target to see atomic emulation in action
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# for testing: you can specify this target to see atomic emulation in action
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[target.riscv32imac-unknown-none-elf]
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[target.riscv32imac-unknown-none-elf]
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runner = "espflash --monitor"
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runner = "espflash flash --monitor"
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rustflags = [
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rustflags = [
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"-C", "link-arg=-Tlinkall.x"
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"-C", "link-arg=-Tlinkall.x"
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]
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]
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@ -46,7 +46,7 @@ ssd1306 = "0.7.1"
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static_cell = "1.0.0"
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static_cell = "1.0.0"
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[features]
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[features]
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default = ["rt", "vectored"]
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default = ["rt", "vectored", "xtal40mhz"]
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direct-boot = []
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direct-boot = []
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eh1 = ["esp-hal-common/eh1", "dep:embedded-hal-1", "dep:embedded-hal-nb"]
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eh1 = ["esp-hal-common/eh1", "dep:embedded-hal-1", "dep:embedded-hal-nb"]
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rt = ["riscv-rt"]
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rt = ["riscv-rt"]
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@ -55,7 +55,9 @@ vectored = ["esp-hal-common/vectored"]
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async = ["esp-hal-common/async", "embedded-hal-async"]
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async = ["esp-hal-common/async", "embedded-hal-async"]
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embassy = ["esp-hal-common/embassy"]
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embassy = ["esp-hal-common/embassy"]
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embassy-time-systick = ["esp-hal-common/embassy-time-systick", "embassy-time/tick-hz-16_000_000"]
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embassy-time-systick = ["esp-hal-common/embassy-time-systick", "embassy-time/tick-hz-16_000_000"]
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embassy-time-timg0 = ["esp-hal-common/embassy-time-timg0", "embassy-time/tick-hz-1_000_000"]
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embassy-time-timg0 = ["esp-hal-common/embassy-time-timg0", "embassy-time/tick-hz-1_000_000"]
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xtal40mhz = ["esp-hal-common/esp32c2_40mhz"]
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xtal26mhz = ["esp-hal-common/esp32c2_26mhz"]
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[[example]]
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[[example]]
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name = "spi_eh1_loopback"
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name = "spi_eh1_loopback"
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@ -2,6 +2,8 @@ use std::{env, fs::File, io::Write, path::PathBuf};
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#[cfg(feature = "direct-boot")]
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#[cfg(feature = "direct-boot")]
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fn main() {
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fn main() {
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check_features();
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// Put the linker script somewhere the linker can find it
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// Put the linker script somewhere the linker can find it
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let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
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let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
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@ -36,6 +38,8 @@ fn main() {
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#[cfg(not(feature = "direct-boot"))]
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#[cfg(not(feature = "direct-boot"))]
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fn main() {
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fn main() {
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check_features();
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// Put the linker script somewhere the linker can find it
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// Put the linker script somewhere the linker can find it
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let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
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let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
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File::create(out.join("memory.x"))
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File::create(out.join("memory.x"))
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@ -62,6 +66,12 @@ fn main() {
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add_defaults();
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add_defaults();
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}
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}
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fn check_features() {
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if cfg!(feature = "xtal40mhz") && cfg!(feature = "xtal26mhz") {
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panic!("Only one xtal speed feature can be selected");
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}
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}
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fn add_defaults() {
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fn add_defaults() {
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let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
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let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
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File::create(out.join("hal-defaults.x"))
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File::create(out.join("hal-defaults.x"))
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@ -1,12 +1,12 @@
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[target.riscv32imc-unknown-none-elf]
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[target.riscv32imc-unknown-none-elf]
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runner = "espflash --monitor"
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runner = "espflash flash --monitor"
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rustflags = [
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rustflags = [
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"-C", "link-arg=-Tlinkall.x"
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"-C", "link-arg=-Tlinkall.x"
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]
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]
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# for testing: you can specify this target to see atomic emulation in action
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# for testing: you can specify this target to see atomic emulation in action
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[target.riscv32imac-unknown-none-elf]
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[target.riscv32imac-unknown-none-elf]
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runner = "espflash --monitor"
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runner = "espflash flash --monitor"
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rustflags = [
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rustflags = [
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"-C", "link-arg=-Tlinkall.x"
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"-C", "link-arg=-Tlinkall.x"
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]
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]
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@ -1,5 +1,5 @@
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[target.xtensa-esp32s2-none-elf]
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[target.xtensa-esp32s2-none-elf]
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runner = "espflash --monitor"
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runner = "espflash flash --monitor"
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[build]
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[build]
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rustflags = [
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rustflags = [
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[target.xtensa-esp32s3-none-elf]
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[target.xtensa-esp32s3-none-elf]
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runner = "espflash --monitor"
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runner = "espflash flash --monitor"
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[build]
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[build]
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rustflags = [
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rustflags = [
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