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Add some config options to the UART driver (#99)

Browse Source 
* Add some config options to the UART driver
* Use esp-println 0.2.0
* Remove the NoPin type
* Serial constructor now doesn't return a Result anymore
This commit is contained in:
Björn Quentin 2022-07-12 17:00:02 +02:00 committed by GitHub
parent 887798fd6f
commit e612bd1120
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
49 changed files with 740 additions and 82 deletions
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26
esp-hal-common/src/gpio.rs
View File

@ -121,8 +121,6 @@ pub trait Pin {
}
pub trait InputPin: Pin {
type InputSignal;
fn set_to_input(&mut self) -> &mut Self;
fn enable_input(&mut self, on: bool) -> &mut Self;
@ -131,21 +129,19 @@ pub trait InputPin: Pin {
fn is_input_high(&self) -> bool;
fn connect_input_to_peripheral(&mut self, signal: Self::InputSignal) -> &mut Self {
fn connect_input_to_peripheral(&mut self, signal: InputSignal) -> &mut Self {
self.connect_input_to_peripheral_with_options(signal, false, false)
}
fn connect_input_to_peripheral_with_options(
&mut self,
signal: Self::InputSignal,
signal: InputSignal,
invert: bool,
force_via_gpio_mux: bool,
) -> &mut Self;
}
pub trait OutputPin: Pin {
type OutputSignal;
fn set_to_open_drain_output(&mut self) -> &mut Self;
fn set_to_push_pull_output(&mut self) -> &mut Self;
@ -164,13 +160,13 @@ pub trait OutputPin: Pin {
fn internal_pull_down_in_sleep_mode(&mut self, on: bool) -> &mut Self;
fn connect_peripheral_to_output(&mut self, signal: Self::OutputSignal) -> &mut Self {
fn connect_peripheral_to_output(&mut self, signal: OutputSignal) -> &mut Self {
self.connect_peripheral_to_output_with_options(signal, false, false, false, false)
}
fn connect_peripheral_to_output_with_options(
&mut self,
signal: Self::OutputSignal,
signal: OutputSignal,
invert: bool,
invert_enable: bool,
enable_from_gpio: bool,
@ -576,8 +572,6 @@ macro_rules! impl_input {
}
impl<MODE> InputPin for $pxi<MODE> {
type InputSignal = $input_signal;
fn set_to_input(&mut self) -> &mut Self {
self.init_input(false, false);
self
@ -607,7 +601,7 @@ macro_rules! impl_input {
fn connect_input_to_peripheral_with_options(
&mut self,
signal: Self::InputSignal,
signal: InputSignal,
invert: bool,
force_via_gpio_mux: bool,
) -> &mut Self {
@ -616,7 +610,7 @@ macro_rules! impl_input {
} else {
match signal {
$( $(
Self::InputSignal::$af_signal => AlternateFunction::$af,
InputSignal::$af_signal => AlternateFunction::$af,
)* )?
_ => AlternateFunction::$gpio_function
}
@ -875,8 +869,6 @@ macro_rules! impl_output {
}
impl<MODE> OutputPin for $pxi<MODE> {
type OutputSignal = $output_signal;
fn set_to_open_drain_output(&mut self) -> &mut Self {
self.init_output(AlternateFunction::$gpio_function, true);
self
@ -948,7 +940,7 @@ macro_rules! impl_output {
fn connect_peripheral_to_output_with_options(
&mut self,
signal: Self::OutputSignal,
signal: OutputSignal,
invert: bool,
invert_enable: bool,
enable_from_gpio: bool,
@ -959,7 +951,7 @@ macro_rules! impl_output {
} else {
match signal {
$( $(
Self::OutputSignal::$af_signal => AlternateFunction::$af,
OutputSignal::$af_signal => AlternateFunction::$af,
)* )?
_ => AlternateFunction::$gpio_function
}
@ -1255,4 +1247,4 @@ pub use impl_interrupt_status_register_access;
pub use impl_output;
pub use impl_output_wrap;
use self::types::InputSignal;
use self::types::{InputSignal, OutputSignal};

5
esp-hal-common/src/i2c.rs
View File

@ -272,10 +272,7 @@ where
/// Create a new I2C instance
/// This will enable the peripheral but the peripheral won't get
/// automatically disabled when this gets dropped.
pub fn new<
SDA: OutputPin<OutputSignal = OutputSignal> + InputPin<InputSignal = InputSignal>,
SCL: OutputPin<OutputSignal = OutputSignal> + InputPin<InputSignal = InputSignal>,
>(
pub fn new<SDA: OutputPin + InputPin, SCL: OutputPin + InputPin>(
i2c: T,
mut sda: SDA,
mut scl: SCL,

7
esp-hal-common/src/pulse_control.rs
View File

@ -237,10 +237,7 @@ pub trait OutputChannel {
/// (Note that we only take a reference here, so the ownership remains with
/// the calling entity. The configured pin thus can be re-configured
/// independently.)
fn assign_pin<RmtPin: OutputPin<OutputSignal = OutputSignal>>(
&mut self,
pin: RmtPin,
) -> &mut Self;
fn assign_pin<RmtPin: OutputPin>(&mut self, pin: RmtPin) -> &mut Self;
/// Send a pulse sequence in a blocking fashion
fn send_pulse_sequence<const N: usize>(
@ -457,7 +454,7 @@ macro_rules! output_channel {
}
/// Assign a pin that should be driven by this channel
fn assign_pin<RmtPin: OutputPin<OutputSignal = OutputSignal>>(
fn assign_pin<RmtPin: OutputPin >(
&mut self,
mut pin: RmtPin,
) -> &mut Self {

414
esp-hal-common/src/serial.rs
View File

@ -1,8 +1,19 @@
//! UART driver
use self::config::Config;
#[cfg(any(feature = "esp32", feature = "esp32s3"))]
use crate::pac::UART2;
use crate::pac::{uart0::RegisterBlock, UART0, UART1};
use crate::{
clock::Clocks,
pac::{
uart0::{fifo::FIFO_SPEC, RegisterBlock},
UART0,
UART1,
},
types::{InputSignal, OutputSignal},
InputPin,
OutputPin,
};
const UART_FIFO_SIZE: u16 = 128;
@ -10,6 +21,183 @@ const UART_FIFO_SIZE: u16 = 128;
#[derive(Debug)]
pub enum Error {}
/// UART configuration
pub mod config {
/// Number of data bits
#[derive(PartialEq, Eq, Copy, Clone, Debug)]
pub enum DataBits {
DataBits5 = 0,
DataBits6 = 1,
DataBits7 = 2,
DataBits8 = 3,
}
/// Parity check
#[derive(PartialEq, Eq, Copy, Clone, Debug)]
pub enum Parity {
ParityNone,
ParityEven,
ParityOdd,
}
/// Number of stop bits
#[derive(PartialEq, Eq, Copy, Clone, Debug)]
pub enum StopBits {
/// 1 stop bit
STOP1 = 1,
/// 1.5 stop bits
STOP1P5 = 2,
/// 2 stop bits
STOP2 = 3,
}
/// UART configuration
#[derive(Debug, Copy, Clone)]
pub struct Config {
pub baudrate: u32,
pub data_bits: DataBits,
pub parity: Parity,
pub stop_bits: StopBits,
}
impl Config {
pub fn baudrate(mut self, baudrate: u32) -> Self {
self.baudrate = baudrate;
self
}
pub fn parity_none(mut self) -> Self {
self.parity = Parity::ParityNone;
self
}
pub fn parity_even(mut self) -> Self {
self.parity = Parity::ParityEven;
self
}
pub fn parity_odd(mut self) -> Self {
self.parity = Parity::ParityOdd;
self
}
pub fn data_bits(mut self, data_bits: DataBits) -> Self {
self.data_bits = data_bits;
self
}
pub fn stop_bits(mut self, stop_bits: StopBits) -> Self {
self.stop_bits = stop_bits;
self
}
}
impl Default for Config {
fn default() -> Config {
Config {
baudrate: 115_200,
data_bits: DataBits::DataBits8,
parity: Parity::ParityNone,
stop_bits: StopBits::STOP1,
}
}
}
}
/// Pins used by the UART interface
pub trait UartPins {
fn configure_pins(
&mut self,
tx_signal: OutputSignal,
rx_signal: InputSignal,
cts_signal: InputSignal,
rts_signal: OutputSignal,
);
}
/// All pins offered by UART
pub struct AllPins<TX: OutputPin, RX: InputPin, CTS: InputPin, RTS: OutputPin> {
pub tx: Option<TX>,
pub rx: Option<RX>,
pub cts: Option<CTS>,
pub rts: Option<RTS>,
}
/// Tx and Rx pins
impl<TX: OutputPin, RX: InputPin, CTS: InputPin, RTS: OutputPin> AllPins<TX, RX, CTS, RTS> {
pub fn new(tx: TX, rx: RX, cts: CTS, rts: RTS) -> AllPins<TX, RX, CTS, RTS> {
AllPins {
tx: Some(tx),
rx: Some(rx),
cts: Some(cts),
rts: Some(rts),
}
}
}
impl<TX: OutputPin, RX: InputPin, CTS: InputPin, RTS: OutputPin> UartPins
for AllPins<TX, RX, CTS, RTS>
{
fn configure_pins(
&mut self,
tx_signal: OutputSignal,
rx_signal: InputSignal,
cts_signal: InputSignal,
rts_signal: OutputSignal,
) {
if let Some(ref mut tx) = self.tx {
tx.set_to_push_pull_output()
.connect_peripheral_to_output(tx_signal);
}
if let Some(ref mut rx) = self.rx {
rx.set_to_input().connect_input_to_peripheral(rx_signal);
}
if let Some(ref mut cts) = self.cts {
cts.set_to_input().connect_input_to_peripheral(cts_signal);
}
if let Some(ref mut rts) = self.rts {
rts.set_to_push_pull_output()
.connect_peripheral_to_output(rts_signal);
}
}
}
pub struct TxRxPins<TX: OutputPin, RX: InputPin> {
pub tx: Option<TX>,
pub rx: Option<RX>,
}
impl<TX: OutputPin, RX: InputPin> TxRxPins<TX, RX> {
pub fn new_tx_rx(tx: TX, rx: RX) -> TxRxPins<TX, RX> {
TxRxPins {
tx: Some(tx),
rx: Some(rx),
}
}
}
impl<TX: OutputPin, RX: InputPin> UartPins for TxRxPins<TX, RX> {
fn configure_pins(
&mut self,
tx_signal: OutputSignal,
rx_signal: InputSignal,
_cts_signal: InputSignal,
_rts_signal: OutputSignal,
) {
if let Some(ref mut tx) = self.tx {
tx.set_to_push_pull_output()
.connect_peripheral_to_output(tx_signal);
}
if let Some(ref mut rx) = self.rx {
rx.set_to_input().connect_input_to_peripheral(rx_signal);
}
}
}
#[cfg(feature = "eh1")]
impl embedded_hal_1::serial::Error for Error {
fn kind(&self) -> embedded_hal_1::serial::ErrorKind {
@ -26,13 +214,46 @@ impl<T> Serial<T>
where
T: Instance,
{
/// Create a new UART instance
pub fn new(uart: T) -> Result<Self, Error> {
/// Create a new UART instance with defaults
pub fn new_with_config<P>(
uart: T,
config: Option<Config>,
mut pins: Option<P>,
clocks: &Clocks,
) -> Self
where
P: UartPins,
{
let mut serial = Serial { uart };
serial.uart.disable_rx_interrupts();
serial.uart.disable_tx_interrupts();
Ok(serial)
if let Some(ref mut pins) = pins {
pins.configure_pins(
serial.uart.tx_signal(),
serial.uart.rx_signal(),
serial.uart.cts_signal(),
serial.uart.rts_signal(),
);
}
config.map(|config| {
serial.change_data_bits(config.data_bits);
serial.change_parity(config.parity);
serial.change_stop_bits(config.stop_bits);
serial.change_baud(config.baudrate, clocks);
});
serial
}
/// Create a new UART instance with defaults
pub fn new(uart: T) -> Self {
let mut serial = Serial { uart };
serial.uart.disable_rx_interrupts();
serial.uart.disable_tx_interrupts();
serial
}
/// Return the raw interface to the underlying UART instance
@ -68,20 +289,135 @@ where
}
fn read_byte(&mut self) -> nb::Result<u8, Error> {
#[allow(unused_variables)]
let offset = 0;
// on ESP32-S2 we need to use PeriBus2 to read the FIFO
#[cfg(feature = "esp32s2")]
let offset = 0x20c00000;
if self.uart.get_rx_fifo_count() > 0 {
let value = self
.uart
.register_block()
.fifo
.read()
.rxfifo_rd_byte()
.bits();
let value = unsafe {
let fifo = (self.uart.register_block().fifo.as_ptr() as *mut u8).offset(offset)
as *mut crate::pac::generic::Reg<FIFO_SPEC>;
(*fifo).read().rxfifo_rd_byte().bits()
};
Ok(value)
} else {
Err(nb::Error::WouldBlock)
}
}
/// Change the number of stop bits
pub fn change_stop_bits(&mut self, stop_bits: config::StopBits) -> &mut Self {
// workaround for hardware issue, when UART stop bit set as 2-bit mode.
#[cfg(feature = "esp32")]
if stop_bits == config::StopBits::STOP2 {
self.uart
.register_block()
.rs485_conf
.modify(|_, w| w.dl1_en().bit(true));
self.uart
.register_block()
.conf0
.modify(|_, w| unsafe { w.stop_bit_num().bits(1) });
} else {
self.uart
.register_block()
.rs485_conf
.modify(|_, w| w.dl1_en().bit(false));
self.uart
.register_block()
.conf0
.modify(|_, w| unsafe { w.stop_bit_num().bits(stop_bits as u8) });
}
#[cfg(not(feature = "esp32"))]
self.uart
.register_block()
.conf0
.modify(|_, w| unsafe { w.stop_bit_num().bits(stop_bits as u8) });
self
}
/// Change the number of data bits
fn change_data_bits(&mut self, data_bits: config::DataBits) -> &mut Self {
self.uart
.register_block()
.conf0
.modify(|_, w| unsafe { w.bit_num().bits(data_bits as u8) });
self
}
/// Change the type of parity checking
fn change_parity(&mut self, parity: config::Parity) -> &mut Self {
self.uart
.register_block()
.conf0
.modify(|_, w| match parity {
config::Parity::ParityNone => w.parity_en().clear_bit(),
config::Parity::ParityEven => w.parity_en().set_bit().parity().clear_bit(),
config::Parity::ParityOdd => w.parity_en().set_bit().parity().set_bit(),
});
self
}
#[cfg(any(feature = "esp32c3", feature = "esp32s3"))]
fn change_baud(&self, baudrate: u32, clocks: &Clocks) {
// we force the clock source to be APB and don't use the decimal part of the
// divider
let clk = clocks.apb_clock.to_Hz();
let max_div = 0b1111_1111_1111 - 1;
let clk_div = ((clk) + (max_div * baudrate) - 1) / (max_div * baudrate);
self.uart.register_block().clk_conf.write(|w| unsafe {
w.sclk_sel()
.bits(1) // APB
.sclk_div_a()
.bits(0)
.sclk_div_b()
.bits(0)
.sclk_div_num()
.bits(clk_div as u8 - 1)
.rx_sclk_en()
.bit(true)
.tx_sclk_en()
.bit(true)
});
let clk = clk / clk_div;
let divider = clk / baudrate;
let divider = divider as u16;
self.uart
.register_block()
.clkdiv
.write(|w| unsafe { w.clkdiv().bits(divider).frag().bits(0) });
}
#[cfg(any(feature = "esp32", feature = "esp32s2"))]
fn change_baud(&self, baudrate: u32, clocks: &Clocks) {
// we force the clock source to be APB and don't use the decimal part of the
// divider
let clk = clocks.apb_clock.to_Hz();
self.uart
.register_block()
.conf0
.modify(|_, w| w.tick_ref_always_on().bit(true));
let divider = clk / baudrate;
self.uart
.register_block()
.clkdiv
.write(|w| unsafe { w.clkdiv().bits(divider).frag().bits(0) });
}
}
/// UART peripheral instance
@ -167,6 +503,14 @@ pub trait Instance {
idle
}
fn tx_signal(&self) -> OutputSignal;
fn rx_signal(&self) -> InputSignal;
fn cts_signal(&self) -> InputSignal;
fn rts_signal(&self) -> OutputSignal;
}
impl Instance for UART0 {
@ -174,6 +518,22 @@ impl Instance for UART0 {
fn register_block(&self) -> &RegisterBlock {
self
}
fn tx_signal(&self) -> OutputSignal {
OutputSignal::U0TXD
}
fn rx_signal(&self) -> InputSignal {
InputSignal::U0RXD
}
fn cts_signal(&self) -> InputSignal {
InputSignal::U0CTS
}
fn rts_signal(&self) -> OutputSignal {
OutputSignal::U0RTS
}
}
impl Instance for UART1 {
@ -181,6 +541,22 @@ impl Instance for UART1 {
fn register_block(&self) -> &RegisterBlock {
self
}
fn tx_signal(&self) -> OutputSignal {
OutputSignal::U1TXD
}
fn rx_signal(&self) -> InputSignal {
InputSignal::U1RXD
}
fn cts_signal(&self) -> InputSignal {
InputSignal::U1CTS
}
fn rts_signal(&self) -> OutputSignal {
OutputSignal::U1RTS
}
}
#[cfg(any(feature = "esp32", feature = "esp32s3"))]
@ -189,6 +565,22 @@ impl Instance for UART2 {
fn register_block(&self) -> &RegisterBlock {
self
}
fn tx_signal(&self) -> OutputSignal {
OutputSignal::U2TXD
}
fn rx_signal(&self) -> InputSignal {
InputSignal::U2RXD
}
fn cts_signal(&self) -> InputSignal {
InputSignal::U2CTS
}
fn rts_signal(&self) -> OutputSignal {
OutputSignal::U2RTS
}
}
#[cfg(feature = "ufmt")]

7
esp-hal-common/src/spi.rs
View File

@ -52,12 +52,7 @@ where
T: Instance,
{
/// Constructs an SPI instance in 8bit dataframe mode.
pub fn new<
SCK: OutputPin<OutputSignal = OutputSignal>,
MOSI: OutputPin<OutputSignal = OutputSignal>,
MISO: InputPin<InputSignal = InputSignal>,
CS: OutputPin<OutputSignal = OutputSignal>,
>(
pub fn new<SCK: OutputPin, MOSI: OutputPin, MISO: InputPin, CS: OutputPin>(
spi: T,
mut sck: SCK,
mut mosi: MOSI,

6
esp-hal-common/src/utils/smart_leds_adapter.rs
View File

@ -19,7 +19,7 @@ use smart_leds_trait::{SmartLedsWrite, RGB8};
#[cfg(any(feature = "esp32", feature = "esp32s2"))]
use crate::pulse_control::ClockSource;
use crate::{
gpio::{types::OutputSignal, OutputPin},
gpio::OutputPin,
pulse_control::{OutputChannel, PulseCode, RepeatMode, TransmissionError},
};
@ -90,7 +90,7 @@ pub struct SmartLedsAdapter<CHANNEL, PIN, const BUFFER_SIZE: usize> {
impl<CHANNEL, PIN, const BUFFER_SIZE: usize> SmartLedsAdapter<CHANNEL, PIN, BUFFER_SIZE>
where
CHANNEL: OutputChannel,
PIN: OutputPin<OutputSignal = OutputSignal>,
PIN: OutputPin,
{
/// Create a new adapter object that drives the pin using the RMT channel.
pub fn new(mut channel: CHANNEL, pin: PIN) -> SmartLedsAdapter<CHANNEL, PIN, BUFFER_SIZE> {
@ -166,7 +166,7 @@ impl<CHANNEL, PIN, const BUFFER_SIZE: usize> SmartLedsWrite
for SmartLedsAdapter<CHANNEL, PIN, BUFFER_SIZE>
where
CHANNEL: OutputChannel,
PIN: OutputPin<OutputSignal = OutputSignal>,
PIN: OutputPin,
{
type Error = LedAdapterError;
type Color = RGB8;

2
esp32-hal/Cargo.toml
View File

@ -40,7 +40,7 @@ embedded-graphics = "0.7"
panic-halt = "0.2"
ssd1306 = "0.7"
smart-leds = "0.3"
esp-println = { version = "0.1.0", features = ["esp32"] }
esp-println = { version = "0.2.0", features = ["esp32"] }
[features]
default = ["rt"]

70
esp32-hal/examples/advanced_serial.rs Normal file
View File

@ -0,0 +1,70 @@
//! This shows how to configure UART
//! You can short the TX and RX pin and see it reads what was written.
//! Additionally you can connect a logic analzyer to TX and see how the changes
//! of the configuration change the output signal.
#![no_std]
#![no_main]
use esp32_hal::{
clock::ClockControl,
gpio::IO,
pac::Peripherals,
prelude::*,
serial::{
config::{Config, DataBits, Parity, StopBits},
TxRxPins,
},
Delay,
RtcCntl,
Serial,
Timer,
};
use esp_println::println;
use nb::block;
use panic_halt as _;
use xtensa_lx_rt::entry;
#[entry]
fn main() -> ! {
let peripherals = Peripherals::take().unwrap();
let system = peripherals.DPORT.split();
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
// Disable MWDT and RWDT (Watchdog) flash boot protection
timer0.disable();
rtc_cntl.set_wdt_global_enable(false);
let config = Config {
baudrate: 115200,
data_bits: DataBits::DataBits8,
parity: Parity::ParityNone,
stop_bits: StopBits::STOP1,
};
let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
let pins = TxRxPins::new_tx_rx(
io.pins.gpio16.into_push_pull_output(),
io.pins.gpio17.into_floating_input(),
);
let mut serial1 = Serial::new_with_config(peripherals.UART1, Some(config), Some(pins), &clocks);
let mut delay = Delay::new(&clocks);
println!("Start");
loop {
serial1.write(0x42).ok();
let read = block!(serial1.read());
match read {
Ok(read) => println!("Read {:02x}", read),
Err(err) => println!("Error {:?}", err),
}
delay.delay_ms(250u32);
}
}

2
esp32-hal/examples/gpio_interrupt.rs
View File

@ -33,7 +33,7 @@ fn main() -> ! {
// Disable the TIMG watchdog timer.
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let serial0 = Serial::new(peripherals.UART0).unwrap();
let serial0 = Serial::new(peripherals.UART0);
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
// Disable MWDT and RWDT (Watchdog) flash boot protection

2
esp32-hal/examples/hello_world.rs
View File

@ -15,7 +15,7 @@ fn main() -> ! {
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
// Disable MWDT and RWDT (Watchdog) flash boot protection

2
esp32-hal/examples/i2c_display.rs
View File

@ -43,7 +43,7 @@ fn main() -> ! {
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
// Disable watchdog timer

2
esp32-hal/examples/ram.rs
View File

@ -31,7 +31,7 @@ fn main() -> ! {
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
// Disable MWDT flash boot protection
timer0.disable();

2
esp32-hal/examples/read_efuse.rs
View File

@ -22,7 +22,7 @@ fn main() -> ! {
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
// Disable MWDT and RWDT (Watchdog) flash boot protection

2
esp32-hal/examples/spi_loopback.rs
View File

@ -42,7 +42,7 @@ fn main() -> ! {
// the RTC WDT, and the TIMG WDTs.
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
timer0.disable();
rtc_cntl.set_wdt_global_enable(false);

2
esp32-hal/examples/timer_interrupt.rs
View File

@ -33,7 +33,7 @@ fn main() -> ! {
// Disable the TIMG watchdog timer.
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);
let serial0 = Serial::new(peripherals.UART0).unwrap();
let serial0 = Serial::new(peripherals.UART0);
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
// Disable MWDT and RWDT (Watchdog) flash boot protection

1
esp32-hal/src/lib.rs
View File

@ -12,6 +12,7 @@ pub use esp_hal_common::{
prelude,
pulse_control,
ram,
serial,
spi,
utils,
Cpu,

2
esp32c3-hal/Cargo.toml
View File

@ -40,7 +40,7 @@ embedded-graphics = "0.7"
panic-halt = "0.2"
ssd1306 = "0.7"
smart-leds = "0.3"
esp-println = { version = "0.1.0", features = ["esp32c3"] }
esp-println = { version = "0.2.0", features = ["esp32c3"] }
[features]
default = ["rt"]

72
esp32c3-hal/examples/advanced_serial.rs Normal file
View File

@ -0,0 +1,72 @@
//! This shows how to configure UART
//! You can short the TX and RX pin and see it reads what was written.
//! Additionally you can connect a logic analzyer to TX and see how the changes
//! of the configuration change the output signal.
#![no_std]
#![no_main]
use esp32c3_hal::{
clock::ClockControl,
pac::Peripherals,
prelude::*,
serial::{
config::{Config, DataBits, Parity, StopBits},
TxRxPins,
},
RtcCntl,
Serial,
Timer,
IO,
};
use esp_println::println;
use nb::block;
use panic_halt as _;
use riscv_rt::entry;
#[entry]
fn main() -> ! {
let peripherals = Peripherals::take().unwrap();
let system = peripherals.SYSTEM.split();
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);
// Disable watchdog timers
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
timer0.disable();
timer1.disable();
let config = Config {
baudrate: 115200,
data_bits: DataBits::DataBits8,
parity: Parity::ParityNone,
stop_bits: StopBits::STOP1,
};
let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
let pins = TxRxPins::new_tx_rx(
io.pins.gpio1.into_push_pull_output(),
io.pins.gpio2.into_floating_input(),
);
let mut serial1 = Serial::new_with_config(peripherals.UART1, Some(config), Some(pins), &clocks);
timer0.start(250u64.millis());
println!("Start");
loop {
serial1.write(0x42).ok();
let read = block!(serial1.read());
match read {
Ok(read) => println!("Read {:02x}", read),
Err(err) => println!("Error {:?}", err),
}
block!(timer0.wait()).unwrap();
}
}

2
esp32c3-hal/examples/gpio_interrupt.rs
View File

@ -34,7 +34,7 @@ fn main() -> ! {
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);
let serial0 = Serial::new(peripherals.UART0).unwrap();
let serial0 = Serial::new(peripherals.UART0);
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);

2
esp32c3-hal/examples/hello_world.rs
View File

@ -15,7 +15,7 @@ fn main() -> ! {
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);

2
esp32c3-hal/examples/ram.rs
View File

@ -31,7 +31,7 @@ fn main() -> ! {
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
// Disable MWDT flash boot protection
timer0.disable();

2
esp32c3-hal/examples/read_efuse.rs
View File

@ -22,7 +22,7 @@ fn main() -> ! {
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);

2
esp32c3-hal/examples/spi_loopback.rs
View File

@ -43,7 +43,7 @@ fn main() -> ! {
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);

2
esp32c3-hal/examples/systimer.rs
View File

@ -34,7 +34,7 @@ fn main() -> ! {
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);

2
esp32c3-hal/examples/timer_interrupt.rs
View File

@ -32,7 +32,7 @@ fn main() -> ! {
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);
let serial0 = Serial::new(peripherals.UART0).unwrap();
let serial0 = Serial::new(peripherals.UART0);
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);

1
esp32c3-hal/src/lib.rs
View File

@ -13,6 +13,7 @@ pub use esp_hal_common::{
prelude,
pulse_control,
ram,
serial,
spi,
system,
systimer,

2
esp32s2-hal/Cargo.toml
View File

@ -39,7 +39,7 @@ embedded-graphics = "0.7"
panic-halt = "0.2"
ssd1306 = "0.7"
smart-leds = "0.3"
esp-println = { version = "0.1.0", features = ["esp32s2"] }
esp-println = { version = "0.2.0", features = ["esp32s2"] }
[features]
default = ["rt"]

2
esp32s2-hal/examples/adc.rs
View File

@ -1,8 +1,6 @@
//! Connect a potentiometer to PIN3 and see the read values change when
//! rotating the shaft. Alternatively you could also connect the PIN to GND or
//! 3V3 to see the maximum and minimum raw values read.
//!
//! THIS CURRENTLY DOESN'T WORK IN DEBUG BUILDS! THIS NEEDS TO GET FIGURED OUT!
#![no_std]
#![no_main]

70
esp32s2-hal/examples/advanced_serial.rs Normal file
View File

@ -0,0 +1,70 @@
//! This shows how to configure UART
//! You can short the TX and RX pin and see it reads what was written.
//! Additionally you can connect a logic analzyer to TX and see how the changes
//! of the configuration change the output signal.
#![no_std]
#![no_main]
use embedded_hal_1::nb::block;
use esp32s2_hal::{
clock::ClockControl,
gpio::IO,
pac::Peripherals,
prelude::*,
serial::{
config::{Config, DataBits, Parity, StopBits},
TxRxPins,
},
Delay,
RtcCntl,
Serial,
Timer,
};
use esp_println::println;
use panic_halt as _;
use xtensa_lx_rt::entry;
#[entry]
fn main() -> ! {
let peripherals = Peripherals::take().unwrap();
let system = peripherals.SYSTEM.split();
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
// Disable MWDT and RWDT (Watchdog) flash boot protection
timer0.disable();
rtc_cntl.set_wdt_global_enable(false);
let config = Config {
baudrate: 115200,
data_bits: DataBits::DataBits8,
parity: Parity::ParityNone,
stop_bits: StopBits::STOP1,
};
let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
let pins = TxRxPins::new_tx_rx(
io.pins.gpio1.into_push_pull_output(),
io.pins.gpio2.into_floating_input(),
);
let mut serial1 = Serial::new_with_config(peripherals.UART1, Some(config), Some(pins), &clocks);
let mut delay = Delay::new(&clocks);
println!("Start");
loop {
serial1.write(0x42).ok();
let read = block!(serial1.read());
match read {
Ok(read) => println!("Read {:02x}", read),
Err(err) => println!("Error {:?}", err),
}
delay.delay_ms(250u32);
}
}

2
esp32s2-hal/examples/gpio_interrupt.rs
View File

@ -33,7 +33,7 @@ fn main() -> ! {
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
let serial0 = Serial::new(peripherals.UART0).unwrap();
let serial0 = Serial::new(peripherals.UART0);
// Disable MWDT and RWDT (Watchdog) flash boot protection
timer0.disable();

2
esp32s2-hal/examples/hello_world.rs
View File

@ -16,7 +16,7 @@ fn main() -> ! {
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
// Disable MWDT and RWDT (Watchdog) flash boot protection
timer0.disable();

2
esp32s2-hal/examples/i2c_display.rs
View File

@ -43,7 +43,7 @@ fn main() -> ! {
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
// Disable watchdog timer

2
esp32s2-hal/examples/ram.rs
View File

@ -31,7 +31,7 @@ fn main() -> ! {
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
// Disable MWDT flash boot protection
timer0.disable();

2
esp32s2-hal/examples/read_efuse.rs
View File

@ -22,7 +22,7 @@ fn main() -> ! {
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
// Disable MWDT and RWDT (Watchdog) flash boot protection

2
esp32s2-hal/examples/spi_loopback.rs
View File

@ -42,7 +42,7 @@ fn main() -> ! {
// the RTC WDT, and the TIMG WDTs.
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
timer0.disable();
rtc_cntl.set_wdt_global_enable(false);

2
esp32s2-hal/examples/systimer.rs
View File

@ -36,7 +36,7 @@ fn main() -> ! {
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
// Disable MWDT and RWDT (Watchdog) flash boot protection
timer0.disable();

2
esp32s2-hal/examples/timer_interrupt.rs
View File

@ -33,7 +33,7 @@ fn main() -> ! {
// Disable the TIMG watchdog timer.
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);
let serial0 = Serial::new(peripherals.UART0).unwrap();
let serial0 = Serial::new(peripherals.UART0);
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
// Disable MWDT and RWDT (Watchdog) flash boot protection

1
esp32s2-hal/src/lib.rs
View File

@ -11,6 +11,7 @@ pub use esp_hal_common::{
prelude,
pulse_control,
ram,
serial,
spi,
systimer,
utils,

2
esp32s3-hal/Cargo.toml
View File

@ -39,7 +39,7 @@ embedded-graphics = "0.7"
panic-halt = "0.2"
ssd1306 = "0.7"
smart-leds = "0.3"
esp-println = { version = "0.1.0", features = ["esp32s3"] }
esp-println = { version = "0.2.0", features = ["esp32s3"] }
[features]
default = ["rt"]

71
esp32s3-hal/examples/advanced_serial.rs Normal file
View File

@ -0,0 +1,71 @@
//! This shows how to configure UART
//! You can short the TX and RX pin and see it reads what was written.
//! Additionally you can connect a logic analzyer to TX and see how the changes
//! of the configuration change the output signal.
#![no_std]
#![no_main]
use embedded_hal_1::nb::block;
use esp32s3_hal::{
clock::ClockControl,
gpio::IO,
pac::Peripherals,
prelude::*,
serial::{
config::{Config, DataBits, Parity, StopBits},
TxRxPins,
},
Delay,
RtcCntl,
Serial,
Timer,
};
use esp_println::println;
use panic_halt as _;
use xtensa_lx_rt::entry;
#[entry]
fn main() -> ! {
let peripherals = Peripherals::take().unwrap();
let system = peripherals.SYSTEM.split();
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
// Disable MWDT and RWDT (Watchdog) flash boot protection
timer0.disable();
rtc_cntl.set_wdt_global_enable(false);
let config = Config {
baudrate: 115200,
data_bits: DataBits::DataBits8,
parity: Parity::ParityNone,
stop_bits: StopBits::STOP1,
};
let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
let pins = TxRxPins::new_tx_rx(
io.pins.gpio1.into_push_pull_output(),
io.pins.gpio2.into_floating_input(),
);
let mut serial1 =
Serial::new_with_config(peripherals.UART1, Some(config), Some(pins), &clocks);
let mut delay = Delay::new(&clocks);
println!("Start");
loop {
serial1.write(0x42).ok();
let read = block!(serial1.read());
match read {
Ok(read) => println!("Read {:02x}", read),
Err(err) => println!("Error {:?}", err),
}
delay.delay_ms(250u32);
}
}

2
esp32s3-hal/examples/gpio_interrupt.rs
View File

@ -33,7 +33,7 @@ fn main() -> ! {
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
let serial0 = Serial::new(peripherals.UART0).unwrap();
let serial0 = Serial::new(peripherals.UART0);
// Disable MWDT and RWDT (Watchdog) flash boot protection
timer0.disable();

2
esp32s3-hal/examples/hello_world.rs
View File

@ -16,7 +16,7 @@ fn main() -> ! {
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
// Disable MWDT and RWDT (Watchdog) flash boot protection
timer0.disable();

2
esp32s3-hal/examples/i2c_display.rs
View File

@ -43,7 +43,7 @@ fn main() -> ! {
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
// Disable watchdog timer

2
esp32s3-hal/examples/ram.rs
View File

@ -31,7 +31,7 @@ fn main() -> ! {
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
// Disable MWDT flash boot protection
timer0.disable();

2
esp32s3-hal/examples/read_efuse.rs
View File

@ -22,7 +22,7 @@ fn main() -> ! {
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
// Disable MWDT and RWDT (Watchdog) flash boot protection

2
esp32s3-hal/examples/spi_loopback.rs
View File

@ -42,7 +42,7 @@ fn main() -> ! {
// the RTC WDT, and the TIMG WDTs.
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
let mut serial0 = Serial::new(peripherals.UART0);
timer0.disable();
rtc_cntl.set_wdt_global_enable(false);

2
esp32s3-hal/examples/systimer.rs
View File

@ -36,7 +36,7 @@ fn main() -> ! {
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
let serial0 = Serial::new(peripherals.UART0).unwrap();
let serial0 = Serial::new(peripherals.UART0);
// Disable MWDT and RWDT (Watchdog) flash boot protection
timer0.disable();

2
esp32s3-hal/examples/timer_interrupt.rs
View File

@ -33,7 +33,7 @@ fn main() -> ! {
// Disable the TIMG watchdog timer.
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);
let serial0 = Serial::new(peripherals.UART0).unwrap();
let serial0 = Serial::new(peripherals.UART0);
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
// Disable MWDT and RWDT (Watchdog) flash boot protection

1
esp32s3-hal/src/lib.rs
View File

@ -12,6 +12,7 @@ pub use esp_hal_common::{
prelude,
pulse_control,
ram,
serial,
spi,
systimer,
usb_serial_jtag,