mirror of
https://github.com/esp-rs/esp-hal.git
synced 2025-10-02 14:44:42 +00:00
Add temporary #cfg conditionals for WDT handling to allow for build on S3
This commit is contained in:
parent
fe03af805b
commit
fd7999052c
@ -20,6 +20,7 @@ void = { version = "1.0", default-features = false }
|
|||||||
xtensa-lx = { version = "0.6.0", optional = true }
|
xtensa-lx = { version = "0.6.0", optional = true }
|
||||||
xtensa-lx-rt = { version = "0.9.0", optional = true }
|
xtensa-lx-rt = { version = "0.9.0", optional = true }
|
||||||
procmacros = { path = "../esp-hal-procmacros", package = "esp-hal-procmacros" }
|
procmacros = { path = "../esp-hal-procmacros", package = "esp-hal-procmacros" }
|
||||||
|
cfg-if = "1.0.0"
|
||||||
# IMPORTANT:
|
# IMPORTANT:
|
||||||
# Each supported device MUST have its PAC included below along with a
|
# Each supported device MUST have its PAC included below along with a
|
||||||
# corresponding feature.
|
# corresponding feature.
|
||||||
|
@ -13,16 +13,34 @@ impl RtcCntl {
|
|||||||
fn set_wdt_write_protection(&mut self, enable: bool) {
|
fn set_wdt_write_protection(&mut self, enable: bool) {
|
||||||
let wkey = if enable { 0u32 } else { 0x50D8_3AA1 };
|
let wkey = if enable { 0u32 } else { 0x50D8_3AA1 };
|
||||||
|
|
||||||
self.rtc_cntl.wdtwprotect.write(|w| unsafe { w.bits(wkey) });
|
// FIXME: To be removed once the ESP32-S3 SVD
|
||||||
|
// register naming is aligned!
|
||||||
|
cfg_if::cfg_if! {
|
||||||
|
if #[cfg(any(feature = "esp32s3"))] {
|
||||||
|
let register = &self.rtc_cntl.rtc_wdtwprotect;
|
||||||
|
} else {
|
||||||
|
let register = &self.rtc_cntl.wdtwprotect;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
register.write(|w| unsafe { w.bits(wkey) });
|
||||||
}
|
}
|
||||||
|
|
||||||
/// Global switch for RTC_CNTL watchdog functionality
|
/// Global switch for RTC_CNTL watchdog functionality
|
||||||
pub fn set_wdt_global_enable(&mut self, enable: bool) {
|
pub fn set_wdt_global_enable(&mut self, enable: bool) {
|
||||||
self.set_wdt_write_protection(false);
|
self.set_wdt_write_protection(false);
|
||||||
|
|
||||||
self.rtc_cntl
|
// FIXME: To be removed once the ESP32-S3 SVD
|
||||||
.wdtconfig0
|
// register naming is aligned!
|
||||||
.modify(|_, w| w.wdt_en().bit(enable).wdt_flashboot_mod_en().clear_bit());
|
cfg_if::cfg_if! {
|
||||||
|
if #[cfg(any(feature = "esp32s3"))] {
|
||||||
|
let register = &self.rtc_cntl.rtc_wdtconfig0;
|
||||||
|
} else {
|
||||||
|
let register = &self.rtc_cntl.wdtconfig0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
register.modify(|_, w| w.wdt_en().bit(enable).wdt_flashboot_mod_en().clear_bit());
|
||||||
|
|
||||||
self.set_wdt_write_protection(true);
|
self.set_wdt_write_protection(true);
|
||||||
}
|
}
|
||||||
|
Loading…
x
Reference in New Issue
Block a user