Add temporary #cfg conditionals for WDT handling to allow for build on S3

This commit is contained in:
Robert Wiewel 2022-02-26 11:22:15 +01:00
parent fe03af805b
commit fd7999052c
2 changed files with 23 additions and 4 deletions

View File

@ -20,6 +20,7 @@ void = { version = "1.0", default-features = false }
xtensa-lx = { version = "0.6.0", optional = true }
xtensa-lx-rt = { version = "0.9.0", optional = true }
procmacros = { path = "../esp-hal-procmacros", package = "esp-hal-procmacros" }
cfg-if = "1.0.0"
# IMPORTANT:
# Each supported device MUST have its PAC included below along with a
# corresponding feature.

View File

@ -13,16 +13,34 @@ impl RtcCntl {
fn set_wdt_write_protection(&mut self, enable: bool) {
let wkey = if enable { 0u32 } else { 0x50D8_3AA1 };
self.rtc_cntl.wdtwprotect.write(|w| unsafe { w.bits(wkey) });
// FIXME: To be removed once the ESP32-S3 SVD
// register naming is aligned!
cfg_if::cfg_if! {
if #[cfg(any(feature = "esp32s3"))] {
let register = &self.rtc_cntl.rtc_wdtwprotect;
} else {
let register = &self.rtc_cntl.wdtwprotect;
}
}
register.write(|w| unsafe { w.bits(wkey) });
}
/// Global switch for RTC_CNTL watchdog functionality
pub fn set_wdt_global_enable(&mut self, enable: bool) {
self.set_wdt_write_protection(false);
self.rtc_cntl
.wdtconfig0
.modify(|_, w| w.wdt_en().bit(enable).wdt_flashboot_mod_en().clear_bit());
// FIXME: To be removed once the ESP32-S3 SVD
// register naming is aligned!
cfg_if::cfg_if! {
if #[cfg(any(feature = "esp32s3"))] {
let register = &self.rtc_cntl.rtc_wdtconfig0;
} else {
let register = &self.rtc_cntl.wdtconfig0;
}
}
register.modify(|_, w| w.wdt_en().bit(enable).wdt_flashboot_mod_en().clear_bit());
self.set_wdt_write_protection(true);
}