9 Commits

Author SHA1 Message Date
Scott Mabin
19c9cef9a8
auto enable interrupts (#1014)
* auto enable interrupts

* changelog

* cfgs
2023-12-12 17:55:37 +00:00
Björn Quentin
17884743bd
Dma convenience macro (#935)
* Add macro to create DMA buffers and descriptors

* Remove WDT disabling from remaining examples

* CHANGELOG.md entry

* Remove redundant `unsafe`

* Easier way to make RX and TX same sized
2023-12-01 10:22:39 +00:00
Björn Quentin
6005f802ad
I2S: Less generics, nicer API (#983)
* I2S: Less generics, nicer API

* CHANGELOG.md
2023-11-30 07:55:03 +00:00
Dániel Buga
39519dfdc9
RISC-V executors (#947)
* RISC-V executors

* Add multiprio example to RISC-V SoCs

* Check new examples

* Hack in support for generic queue

* Reserve SoftwareInterrupt0 for multicore thread-mode executors

* Merge interrupt executors

* Merge thread-mode executors

* Document the new features and expand on time drivers

* Main tasks don't have to return !

* Unify multiprio examples

* Undo C6 log output change
2023-11-22 14:36:53 +00:00
Dániel Buga
5365031d9d Support SysTimer as timebase on ESP32-S2 2023-10-12 10:15:35 -07:00
Björn Quentin
a0ebdf0399
embassy #[main] convenience for RISC-V / Xtensa (#841) 2023-10-11 12:10:14 +01:00
Dániel Buga
44e968f7a8
Make sure examples can actually build with defmt enabled, build some examples in CI (#810)
* Make sure examples can build with defmt

* Remove duplicate example checks

* Fix examples

* Add changelog entry

* Actually build some examples with defmt feature enabled

* Add the defmt linker script in each package's build script
2023-10-05 12:13:09 -07:00
Jesse Braham
0064766ef2
No longer publicly expose the PeripheralClockControl struct (#817)
* No longer publicly expose the `PeripheralClockControl` struct

* Update examples as needed to get things building again

* Update CHANGELOG.md

* Address review feedback, fix a warning

* Use a critical section for all devices other than the ESP32-C6/H2, as they modify multiple registers

* Rebase and update `etm` driver to fix build errors
2023-09-26 09:07:57 -07:00
Björn Quentin
434a32763c
Async I2S support (#801)
* Async I2S support

* Add CHANGELOG.md entry
2023-09-20 22:23:50 +00:00