* Use div_ceil for buffer size calculation
Replace manual ceiling division with Rust's built-in div_ceil method for
improved readability and standard library usage in DMA buffer allocation
macro.
* Update CHANGELOG
* Cast buffer size to usize in div_ceil calculation
* feat: Only halt cores when using the halt-core feature
* docs: Update changelog
* feat: Remove p4 code
* feat: Use a cs arround the loop
* feat: Only define halt method when required
* working rx
* very sketchy working tx
* uart uhci qa example
* move it
* cleanout
* read working great, write outputs the whole buffer
* tx working but rx can freeze
* fix freezes
* dont use vec
* cleaning
* async weird and not working
* async working?
* into async
* Apply suggested changes
* it compiles
* it also works with 'd
* split into seperate structs
* Add uart config configuration after uhci consumed it
* working Uhci normal
* again aaa sorry
* Apply suggested changes (That I knew how to implement)
* Add proper publicity, reimplement wrappers for internal functions using a macro, repair examples
* Moved to config, uhci normal example doesn't echo
* still not working
* hacky works normal
* apply suggested changes
* Initial docs
* fix messing up rx tx, still doesn't work
* Workaround, working but well
* change back to not pub (Maybe redo to public later, for now just to not mess with the workaround)
* now its working
* forgot to push
* Revert 2 commits, implement drop to showcase problem
* apply some suggested changes
* apply more suggested fixes (async/blocking)
* Everything works
* clearing out warnings
* handle errors
* merge from upstream, make it compile (not sure)
* Apply almost all suggestions
* re add wait for done
* Move errors out of wait_for_done, formating, changelog
* Apply suggested changes
* apply lint suggestions
* docs
* No longer public
* hil tests, rx tx transfer
* implement split
* forgot to format
* apply suggested changes
* Add top level module doc
* cicd now working?
* format, cicd maybe now
* apply suggestion
* format fix
* modify to write
* feat(example): Add SNTP example to show how to update Rtc
* Bump embassy-net to 0.7.0 for compatibility
* Revert back to task-arena to build on stable.
* Run test with multiple timeouts
* Align hw_bus_clear option with esp-idf
* Generate stop condition after HW bus clearing
* Tweak software bus clearing algo
* Make sure I2C is always reset
* Properly set finished flag even on timeouts
* Fix reset/clear interactions
* Add a note about blocking in Drop
* Add changelog entry
* Move `embassy_wifi_bench`, `wifi_bench`, and `wifi_csi` examples to `qa-test` package
* Remove blocking BLE example, replace Embassy example with trouble-based scanner
* Add BLE `bas_peripheral` example
* Don't estimate XTAL with RC oscillator if not necessary. Accept wider range in HIL tests. Skip calibration if value is valid.
* Init clock before RTC domain
* Clarify the meaning of the coexist feature
* Update esp-radio/Cargo.toml
Co-authored-by: Dániel Buga <bugadani@gmail.com>
---------
Co-authored-by: Dániel Buga <bugadani@gmail.com>
* Read EP1_CONF_REG to get UART FIFO status in UsbSerialJtagTx::flush_tx_async
If the USB_SERIAL_JTAG_SERIAL_IN bit is 1, UART Tx FIFO is not full.
This makes flush_tx_async read the same bits as flush_tx_nb and the blocking flush_tx.
* Add change of UsbSerialJtag's async function to CHANGELOG
* Apply suggestion from @bugadani
---------
Co-authored-by: Dániel Buga <bugadani@gmail.com>
* Refactor `os_adapter` into directory module
* Clean up Cargo manifest a bit
* Add and improve documentation for `wifi` module
* Address review comment
* Split wifi feature into wifi-ap, wifi-sta and wifi-eap
* changelog
* Revert most of the changes, keep wifi and wifi-eap features only
* wifi-eap is unstable, include this feature into CI tests and documentation
* More consistent naming of interrupt-related functions
* MG entry
* changelog
* use correct package for MG
* fix hil
* other drivers
* address review comments
