56 Commits

Author	SHA1	Message	Date
Jesse Braham	c63f40f412	Actually enforce clippy lints in CI (#767) ... * Actually enforce clippy lints in CI * Fix a couple clippy lints in `esp-riscv-rt` * Fix a couple clippy lints for `esp32c6-lp-hal`	2023-08-30 10:30:36 -07:00
Björn Quentin	424b96532f	Fix RISCV stack-start (#721)	2023-08-14 17:05:29 +02:00
Björn Quentin	92bda00296	Remove heap related symbols, use all remaining memory for the stack (#716) ... * Use all remaining memory for stack(s) * Remove HEAP related code from RISCV linker scripts * Fix direct-boot / mcu-boot linker scripts * Use a statically allocated stack for core-1	2023-08-14 13:38:36 +02:00
Jesse Braham	846f3b0b50	New package releases (#713) ... * Add/update `rust-version` to manifests where it is missing or out of date * Use latest versions of published PACs * New package releases	2023-08-10 08:44:15 -07:00
onsdagens	d6d5e0c86b	Adding direct vector table hooking support for RISC-V's (#621) ... * direct vectoring support added * provide minimal handlers for hooking the vector table directly * changed direct vectoring interrupt enable interface to map to CPU interrupt * direct vectoring interrupt nesting * removed unused dependency * added tentative c2 and c6 support for direct vector table hooking * added direct vectoring examples * added direct vectoring examples * updated changelog * added direct vectoring to CI * Added H2 support and example, moved helpers to esp-hal-common * Added H2 direct vectoring example to CI * Removed remnants of removed feature * C6 and H2 examples fixed * C6 and H2 examples fixed * C6 and H2 examples fixed * Comment fixed * Added preemption flag to RT --------- Co-authored-by: Scott Mabin <scott@mabez.dev>	2023-08-01 16:28:40 +01:00
Scott Mabin	8361ca308c	Move esp-riscv-rt into esp-hal (#578) ... * Move esp-riscv-rt into esp-hal * Add changelog entry	2023-06-07 08:15:47 -07:00