* H2: Use PLL_48M_CLK in Timg driver and add imer_interrupt example
* Clean timer driver, add helper configure_src_clk and configure_wdt_src_clk methods
* H2: Add imer_interrupt example
* add helper methods for selecting default clk src
* Change PR number in the Changelog
* Update the `GDMA` driver to support the ESP32-H2
* Update the `SPI` driver to support the ESP32-H2
* Add `SPI` examples for ESP32-H2
* Update CHANGELOG
* Remove copy-pasted references to ESP32-C6
* Update GPIO pins used in SPI examples, add `qspi_flash` example
* Update SPI clock configuration to produce correct clock rate
* Correct comment regarding clock source frequency
Co-authored-by: Sergio Gasquez Arcos <sergio.gasquez@gmail.com>
* H2: Add PLL_48M_CLK src to ClockControl and RawClocks
* H2: Use PLL_48M_CLK as SPI clk src
* H2: cleanup commented block in SPI driver
* H2: update docs comment in embassy_spi example
* fmt
* Add a new line in embassy_spi example
---------
Co-authored-by: Sergio Gasquez Arcos <sergio.gasquez@gmail.com>
Co-authored-by: Juraj Sadel <juraj.sadel@espressif.com>
* feat: relocate riscv isr to iram
Previously, the trap vector itself and its immediate callees
(`_start_trap` and `_start_trap_rust_hal`) were located in the mapped
instruction flash range `0x420..`, increasing cache pressure and adding
variable latency to the very beginning of the interrupt/exception
service flow.
This change places those routines in iram directly:
```
Num: Value Size Type Bind Vis Ndx Name
48177: 40380280 2428 FUNC GLOBAL DEFAULT 6 _start_trap_rust_hal
48197: 40380bfc 54 FUNC GLOBAL DEFAULT 6 _start_trap_rust
48265: 40380200 0 FUNC GLOBAL DEFAULT 6 _vector_table
48349: 40380100 0 NOTYPE GLOBAL DEFAULT 6 default_start_trap
48350: 40380100 0 NOTYPE GLOBAL DEFAULT 6 _start_trap
```
As seen via `readelf -W -s -C ./target/riscv32imc-unknown-none-elf/debug/examples/gpio_interrupt | grep -E _start_trap\|_vector\|Ndx`
* feat(riscv): place .trap in RAM
This change follows through on relocating the `_vector_table`,
`_start_trap`, and `_start_trap_rust` functions for all present
build/link modes for the 'c2, 'c3, 'c6, and 'h2.
It has been tested by running the `software_interrupts` example for the
'c3 in direct-boot and esp-bootloader contexts, but I wasn't able to
identify how to run the `mcu-boot` mode for the 'c3, nor do I have
present access to any of the other devices for testing.
* docs: Update CHANGELOG.md
* Added init function
* Populated enums
* Adding enums
* Add TODO (according to IDF update)
* Added WDT support for ESP32-H2
* Updated hello_world example
* Add two examples for both watchdog and RTC watchdog
* Add specific bit initialization for TIMG0 and TIMG1
* Cleaning the code
* adjusting for rustfmt
* uncommented direct-boot feature test in CI
* Begin working on `PeripheralClockControl` for the ESP32-H2
* Update `UART` driver to add H2 support
* Update `TIMG` driver to add H2 support
* Update the hello_world example to use `TIMG` and `UART`
