* Mark interconnect as unstable
* Explicitly set unstable feature in HIL tests
* WIP append feature set name to artifact
* Add name to feature sets, build all combinations
* Fix tests
* Provide a looping executor for stable async tests
* Fix usb serial jtag
* Hide interconnect types
* HIL(QOL): Add missing timeouts to various tests
* Increase timeouts for ECC
* Use global timeout in hil tests
* sha: increase test_digest_of_size_1_to_200 timeout from 10 to 15 seconds
* Remove configure_for_async
* Add into_async and into_blocking to I2c
* Add into_async and into_blocking to UsbSerialJtag
* Rework LCD_CAM
* Rmt
* RSA
* TWAI
* Uart
* Documentation
* Disable interrupts set on other core
* Move configure into RegisterAccess
* Disable interrupts on the other core
* Use EnumSet in RMT
* Print panic messages using semihosting
* Don't use defmt's asserts
* Make RA_OFFSET available without panic-handler
* Re-add defmt imports where missing
* Revert unintended test change
* Initialise hal in critical-section test
* Disable defmt in tests by default
* per TRM the TX clock should only be re-enabled after tx_start
* CHANGELOG
* added tests to check the for the correct number of clocks during valid
* parl_io: fix test for esp32h2
* tests: parl_io: h2 PCNT does not like 20MHz