# ESP32-C2 Device Metadata # # Empty [`device.driver`] tables imply `partial` support status. # # If you modify a driver support status, run `cargo xtask update-chip-support-table` to # update the table in the esp-hal README. [device] name = "esp32c2" arch = "riscv" target = "riscv32imc-unknown-none-elf" cores = 1 trm = "https://www.espressif.com/sites/default/files/documentation/esp8684_technical_reference_manual_en.pdf" peripherals = [ { name = "APB_CTRL" }, { name = "APB_SARADC" }, { name = "BB" }, { name = "ASSIST_DEBUG" }, { name = "DMA" }, { name = "ECC" }, { name = "EFUSE" }, { name = "EXTMEM" }, { name = "GPIO" }, { name = "I2C_ANA_MST" }, { name = "I2C0", interrupts = { peri = "I2C_EXT0" } }, { name = "INTERRUPT_CORE0" }, { name = "IO_MUX" }, { name = "LEDC" }, { name = "RNG" }, { name = "LPWR", pac = "RTC_CNTL" }, { name = "MODEM_CLKRST" }, { name = "SENSITIVE" }, { name = "SHA", interrupts = { peri = "SHA" } }, { name = "SPI0" }, { name = "SPI1" }, { name = "SPI2", interrupts = { peri = "SPI2" } }, { name = "SYSTEM" }, { name = "SYSTIMER" }, { name = "TIMG0" }, { name = "UART0", interrupts = { peri = "UART0" } }, { name = "UART1", interrupts = { peri = "UART1" } }, { name = "XTS_AES" }, { name = "DMA_CH0", virtual = true }, { name = "ADC1", virtual = true }, { name = "BT", virtual = true }, { name = "SW_INTERRUPT", virtual = true }, { name = "WIFI", virtual = true }, { name = "MEM2MEM1", virtual = true }, { name = "MEM2MEM2", virtual = true }, { name = "MEM2MEM3", virtual = true }, { name = "MEM2MEM4", virtual = true }, { name = "MEM2MEM5", virtual = true }, { name = "MEM2MEM6", virtual = true }, { name = "MEM2MEM7", virtual = true }, { name = "MEM2MEM8", virtual = true }, ] symbols = [ # Additional peripherals defined by us (the developers): "gdma", "phy", "swd", # ROM capabilities "rom_crc_le", "rom_crc_be", "rom_md5_mbedtls", # Wakeup SOC based on ESP-IDF: "pm_support_wifi_wakeup", "pm_support_bt_wakeup", "uart_support_wakeup_int", "gpio_support_deepsleep_wakeup", # Which bluetooth implementation "npl", ] memory = [{ name = "dram", start = 0x3FCA_0000, end = 0x3FCE_0000 }] [device.soc] cpu_has_csr_pc = true rc_fast_clk_default = 17_500_000 rc_slow_clock = 136_000 xtal_options = [26, 40] [device.adc] support_status = "partial" instances = [ { name = "adc1" }, ] [device.assist_debug] support_status = "partial" has_sp_monitor = true [device.gpio] support_status = "supported" gpio_function = 1 constant_0_input = 0x1f constant_1_input = 0x1e pins = [ { pin = 0, analog = { 1 = "ADC1_CH0" }, rtc = { 0 = "RTC_GPIO0" } }, { pin = 1, analog = { 1 = "ADC1_CH1" }, rtc = { 0 = "RTC_GPIO1" } }, { pin = 2, functions = { 2 = "FSPIQ" }, analog = { 1 = "ADC1_CH2" }, rtc = { 0 = "RTC_GPIO2" } }, { pin = 3, analog = { 1 = "ADC1_CH3" }, rtc = { 0 = "RTC_GPIO3" } }, { pin = 4, functions = { 0 = "MTMS", 2 = "FSPIHD" }, analog = { 1 = "ADC1_CH4" }, rtc = { 0 = "RTC_GPIO4" } }, { pin = 5, functions = { 0 = "MTDI", 2 = "FSPIWP" }, rtc = { 0 = "RTC_GPIO5" } }, { pin = 6, functions = { 0 = "MTCK", 2 = "FSPICLK" } }, { pin = 7, functions = { 0 = "MTDO", 2 = "FSPID" } }, { pin = 8 }, { pin = 9 }, { pin = 10 }, # Available without SiP flash { pin = 11, functions = { 0 = "SPIHD" } }, # Available without SiP flash { pin = 12, functions = { 0 = "SPIHD" } }, # Available without SiP flash { pin = 13, functions = { 0 = "SPIWP" } }, # Available without SiP flash { pin = 14, functions = { 0 = "SPICS0" } }, # Available without SiP flash { pin = 15, functions = { 0 = "SPICLK" } }, # Available without SiP flash { pin = 16, functions = { 0 = "SPID" } }, # Available without SiP flash { pin = 17, functions = { 0 = "SPIQ" } }, # Available without SiP flash { pin = 18 }, { pin = 19, functions = { 0 = "U0RXD" } }, { pin = 20, functions = { 0 = "U0TXD" } }, ] input_signals = [ { name = "SPIQ", id = 0 }, { name = "SPID", id = 1 }, { name = "SPIHD", id = 2 }, { name = "SPIWP", id = 3 }, { name = "U0RXD", id = 6 }, { name = "U0CTS", id = 7 }, { name = "U0DSR", id = 8 }, { name = "U1RXD", id = 9 }, { name = "U1CTS", id = 10 }, { name = "U1DSR", id = 11 }, { name = "CPU_GPIO_0", id = 28 }, { name = "CPU_GPIO_1", id = 29 }, { name = "CPU_GPIO_2", id = 30 }, { name = "CPU_GPIO_3", id = 31 }, { name = "CPU_GPIO_4", id = 32 }, { name = "CPU_GPIO_5", id = 33 }, { name = "CPU_GPIO_6", id = 34 }, { name = "CPU_GPIO_7", id = 35 }, { name = "EXT_ADC_START", id = 45 }, { name = "RMT_SIG_0", id = 51 }, { name = "RMT_SIG_1", id = 52 }, { name = "I2CEXT0_SCL", id = 53 }, { name = "I2CEXT0_SDA", id = 54 }, { name = "FSPICLK", id = 63 }, { name = "FSPIQ", id = 64 }, { name = "FSPID", id = 65 }, { name = "FSPIHD", id = 66 }, { name = "FSPIWP", id = 67 }, { name = "FSPICS0", id = 68 }, { name = "SIG_FUNC_97", id = 97 }, { name = "SIG_FUNC_98", id = 98 }, { name = "SIG_FUNC_99", id = 99 }, { name = "SIG_FUNC_100", id = 100 }, { name = "MTCK" }, { name = "MTMS" }, { name = "MTDI" }, ] output_signals = [ { name = "SPIQ", id = 0 }, { name = "SPID", id = 1 }, { name = "SPIHD", id = 2 }, { name = "SPIWP", id = 3 }, { name = "SPICLK", id = 4 }, { name = "SPICS0", id = 5 }, { name = "U0TXD", id = 6 }, { name = "U0RTS", id = 7 }, { name = "U0DTR", id = 8 }, { name = "U1TXD", id = 9 }, { name = "U1RTS", id = 10 }, { name = "U1DTR", id = 11 }, { name = "SPIQ_MONITOR", id = 15 }, { name = "SPID_MONITOR", id = 16 }, { name = "SPIHD_MONITOR", id = 17 }, { name = "SPIWP_MONITOR", id = 18 }, { name = "SPICS1", id = 19 }, { name = "CPU_GPIO_0", id = 28 }, { name = "CPU_GPIO_1", id = 29 }, { name = "CPU_GPIO_2", id = 30 }, { name = "CPU_GPIO_3", id = 31 }, { name = "CPU_GPIO_4", id = 32 }, { name = "CPU_GPIO_5", id = 33 }, { name = "CPU_GPIO_6", id = 34 }, { name = "CPU_GPIO_7", id = 35 }, { name = "LEDC_LS_SIG0", id = 45 }, { name = "LEDC_LS_SIG1", id = 46 }, { name = "LEDC_LS_SIG2", id = 47 }, { name = "LEDC_LS_SIG3", id = 48 }, { name = "LEDC_LS_SIG4", id = 49 }, { name = "LEDC_LS_SIG5", id = 50 }, { name = "RMT_SIG_0", id = 51 }, { name = "RMT_SIG_1", id = 52 }, { name = "I2CEXT0_SCL", id = 53 }, { name = "I2CEXT0_SDA", id = 54 }, { name = "FSPICLK", id = 63 }, { name = "FSPIQ", id = 64 }, { name = "FSPID", id = 65 }, { name = "FSPIHD", id = 66 }, { name = "FSPIWP", id = 67 }, { name = "FSPICS0", id = 68 }, { name = "FSPICS1", id = 69 }, { name = "FSPICS3", id = 70 }, { name = "FSPICS2", id = 71 }, { name = "FSPICS4", id = 72 }, { name = "FSPICS5", id = 73 }, { name = "ANT_SEL0", id = 89 }, { name = "ANT_SEL1", id = 90 }, { name = "ANT_SEL2", id = 91 }, { name = "ANT_SEL3", id = 92 }, { name = "ANT_SEL4", id = 93 }, { name = "ANT_SEL5", id = 94 }, { name = "ANT_SEL6", id = 95 }, { name = "ANT_SEL7", id = 96 }, { name = "SIG_FUNC_97", id = 97 }, { name = "SIG_FUNC_98", id = 98 }, { name = "SIG_FUNC_99", id = 99 }, { name = "SIG_FUNC_100", id = 100 }, { name = "CLK_OUT1", id = 123 }, { name = "CLK_OUT2", id = 124 }, { name = "CLK_OUT3", id = 125 }, { name = "GPIO", id = 128 }, { name = "MTDO" }, ] [device.i2c_master] support_status = "supported" instances = [ { name = "i2c0", sys_instance = "I2cExt0", scl = "I2CEXT0_SCL", sda = "I2CEXT0_SDA" }, ] has_fsm_timeouts = true has_hw_bus_clear = true ll_intr_mask = 0x3ffff fifo_size = 16 has_bus_timeout_enable = true max_bus_timeout = 0x1F has_conf_update = true has_arbitration_en = true has_tx_fifo_watermark = true bus_timeout_is_exponential = true [device.interrupts] support_status = "partial" status_registers = 2 [device.sha] support_status = "partial" dma = true algo = { sha1 = 0, sha224 = 1, sha256 = 2 } [device.spi_master] support_status = "supported" instances = [ { name = "spi2", sys_instance = "Spi2", sclk = "FSPICLK", sio = ["FSPID", "FSPIQ", "FSPIWP", "FSPIHD"], cs = ["FSPICS0", "FSPICS1", "FSPICS2", "FSPICS3", "FSPICS4", "FSPICS5"] }, ] [device.spi_slave] support_status = "partial" instances = [ { name = "spi2", sys_instance = "Spi2", sclk = "FSPICLK", mosi = "FSPID", miso = "FSPIQ", cs = "FSPICS0" }, ] [device.timergroup] support_status = "partial" instances = [{ name = "timg0" }] timg_has_divcnt_rst = true default_clock_source = 0 # use_xtal = false default_wdt_clock_source = 0 # use_wdt_xtal = false [device.uart] support_status = "supported" instances = [ { name = "uart0", sys_instance = "Uart0", tx = "U0TXD", rx = "U0RXD", cts = "U0CTS", rts = "U0RTS" }, { name = "uart1", sys_instance = "Uart1", tx = "U1TXD", rx = "U1RXD", cts = "U1CTS", rts = "U1RTS" }, ] ram_size = 128 [device.rng] support_status = "partial" apb_cycle_wait_num = 16 # TODO # Other drivers which are partially supported but have no other configuration: ## Crypto # [device.aes] Product portfolio lists AES, but TRM only has XTS_AES? [device.ecc] ## Interfaces [device.ledc] ## Miscellaneous [device.dma] [device.io_mux] [device.temp_sensor] [device.sleep] [device.systimer] ## Radio [device.wifi] [device.bt] [device.phy] combo_module = true