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https://github.com/esp-rs/esp-hal.git
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9bf70ff792
* Combine `esp-ulp-riscv-hal` and `esp32c6-lp-hal` into a single package * Update LP core examples * Update CI workflow * Fix `LP_UART` example
54 lines
840 B
Plaintext
54 lines
840 B
Plaintext
/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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ENTRY(reset_vector)
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CONFIG_ULP_COPROC_RESERVE_MEM = 8 * 1024;
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MEMORY
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{
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ram(RW) : ORIGIN = 0, LENGTH = CONFIG_ULP_COPROC_RESERVE_MEM
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}
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SECTIONS
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{
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. = ORIGIN(ram);
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.text :
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{
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*(.text.vectors) /* Default reset vector must link to offset 0x0 */
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KEEP(*(.init));
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KEEP(*(.init.rust));
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*(.text)
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*(.text*)
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} >ram
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.rodata ALIGN(4):
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{
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*(.rodata)
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*(.rodata*)
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} > ram
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.data ALIGN(4):
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{
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*(.data)
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*(.data*)
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*(.sdata)
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*(.sdata*)
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} > ram
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.bss ALIGN(4) :
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{
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*(.bss)
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*(.bss*)
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*(.sbss)
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*(.sbss*)
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} >ram
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__stack_top = ORIGIN(ram) + LENGTH(ram);
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}
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