esp-hal/esp32s3-hal/examples/ulp_riscv_core_basic.rs
Björn Quentin c612fecfae
Clear LP/RTC RAM (#916)
* Clear LP_RAM/RTC RAM to make sure .bss is cleared

* Rename `ulp-riscv-hal` to `esp-ulp-riscv-hal`

* CHANGELOG.md entry
2023-11-09 14:06:58 +01:00

49 lines
1.3 KiB
Rust

//! This shows a very basic example of running code on the ULP RISCV core.
//!
//! Code on ULP core just increments a counter and blinks GPIO 1. The current
//! value is printed by the HP core.
#![no_std]
#![no_main]
use esp32s3_hal::{
clock::ClockControl,
gpio::rtc_io::*,
peripherals::Peripherals,
prelude::*,
ulp_core,
IO,
};
use esp_backtrace as _;
use esp_println::{print, println};
#[entry]
fn main() -> ! {
let peripherals = Peripherals::take();
let system = peripherals.SYSTEM.split();
let _clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
let pin = io.pins.gpio1.into_low_power().into_push_pull_output();
let mut ulp_core = ulp_core::UlpCore::new(peripherals.ULP_RISCV_CORE);
ulp_core.stop();
println!("ulp core stopped");
// load code to LP core
let lp_core_code = load_lp_code!(
"../esp-ulp-riscv-hal/target/riscv32imc-unknown-none-elf/release/examples/blinky"
);
// start LP core
lp_core_code.run(&mut ulp_core, ulp_core::UlpCoreWakeupSource::HpCpu, pin);
println!("ulpcore run");
let data = (0x5000_0400) as *mut u32;
loop {
print!("Current {:x} \u{000d}", unsafe {
data.read_volatile()
});
}
}