mirror of https://github.com/esp-rs/esp-hal.git synced 2025-09-28 04:40:52 +00:00

History

Use cargo-batch to build tests and examples, avoid linting so much (#4108 )

* Use cargo-batch

* Run CI on mac runner

* Rely on MSRV and nightly jobs to lint

* Build docs separately

* Don't copy examples - fix builds on stable

* Run everything by default, set CI env var in ci command

* Run batched commands with RUSTC_BOOTSTRAP enabled

* Force cargo-batch to correctly ignore unstable option

* Test with nightly

* Use a persistent target folder, remove cache

* Don't delete the lp examples

* Restore target dir

* Build with stable again

* Fix rebase fail

* Remove handling tests

* Remove redundant code

* Restore repeated test run option

* Add simpler cargo check

* Introduce check-packages

* Remove stabilized -Zdoctest-xcompile

* Clean up commented code

* Remove more stuff

* Fix uart_uhci test

* No badger for us

2025-09-18 11:25:11 +00:00

.cargo

Use cargo-batch to build tests and examples, avoid linting so much (#4108 )

2025-09-18 11:25:11 +00:00

examples

Remove embedded-hal 0.2.x impls and dependency from esp-lp-hal package (#2609 )

2024-11-27 14:54:00 +00:00

Combine the esp-ulp-riscv-hal and esp32c6-lp-hal packages (#1115 )

2024-01-26 13:46:51 +00:00

src

More consistent naming of interrupt-related functions (#3933 )

2025-08-21 09:46:04 +00:00

build.rs

Use metadata to define LP peripheral FIFO sizes (#3812 )

2025-07-17 12:16:24 +00:00

Cargo.toml

Use riscv-rt's startup and trap-handling code (#3857 )

2025-09-11 07:48:44 +00:00

CHANGELOG.md

Use metadata to define LP peripheral FIFO sizes (#3812 )

2025-07-17 12:16:24 +00:00

README.md

Don't lie about the MSRV (#3692 )

2025-06-25 11:20:52 +00:00

esp-lp-hal

Bare-metal (no_std) hardware abstraction layer for the low-power RISC-V coprocessors found in the ESP32-C6, ESP32-S2, and ESP32-S3 from Espressif.

Implements a number of blocking and, where applicable, async traits from the various packages in the embedded-hal repository.

For help getting started with this HAL, please refer to The Rust on ESP Book and the [documentation].

Supported Devices

Chip	Datasheet	Technical Reference Manual	Target
ESP32-C6	ESP32-C6	ESP32-C6	`riscv32imac-unknown-none-elf`
ESP32-S2	ESP32-S2	ESP32-S2	`riscv32imc-unknown-none-elf`
ESP32-S3	ESP32-S3	ESP32-S3	`riscv32imc-unknown-none-elf`

Minimum Supported Rust Version (MSRV)

This crate is guaranteed to compile when using the latest stable Rust version at the time of the crate's release. It might compile with older versions, but that may change in any new release, including patches.

License

Licensed under either of:

Apache License, Version 2.0 (LICENSE-APACHE or http://www.apache.org/licenses/LICENSE-2.0)
MIT license (LICENSE-MIT or http://opensource.org/licenses/MIT)

at your option.

Contribution

Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.