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https://github.com/esp-rs/esp-hal.git
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db409ffe7b
* Unify the system peripheral Whilst the PCR, SYSTEM and DPORT peripherals are different, we currently use them all in the same way. This PR unifies the peripheral name in the hal to `SYSTEM`. The idea is that they all do the same sort of thing, so we can collect them under the same name, and later down the line we can being to expose differences under an extended API. The benifits to this are imo quite big, the examples now are all identical, which makes things easier for esp-wifi, and paves a path towards the multichip hal. Why not do this in the PAC? Imo the pac should be as close to the hardware as possible, and the HAL is where we should abstractions such as this. * changelog
91 lines
2.3 KiB
Rust
91 lines
2.3 KiB
Rust
//! This shows using Parallel IO to input 4 bit parallel data at 1MHz clock
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//! rate.
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//!
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//! Uses GPIO 1, 2, 3 and 4 as the data pins.
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#![no_std]
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#![no_main]
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use esp32h2_hal::{
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clock::ClockControl,
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dma::DmaPriority,
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gdma::Gdma,
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gpio::IO,
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parl_io::{BitPackOrder, NoClkPin, ParlIoRxOnly, RxFourBits},
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peripherals::Peripherals,
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prelude::*,
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timer::TimerGroup,
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Delay,
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Rtc,
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};
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use esp_backtrace as _;
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use esp_println::println;
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take();
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let system = peripherals.SYSTEM.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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// Disable the watchdog timers.
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let mut rtc = Rtc::new(peripherals.LP_CLKRST);
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let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks);
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let mut wdt0 = timer_group0.wdt;
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let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks);
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let mut wdt1 = timer_group1.wdt;
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rtc.swd.disable();
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rtc.rwdt.disable();
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wdt0.disable();
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wdt1.disable();
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let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
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let mut tx_descriptors = [0u32; 8 * 3];
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let mut rx_descriptors = [0u32; 8 * 3];
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let dma = Gdma::new(peripherals.DMA);
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let dma_channel = dma.channel0;
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let rx_pins = RxFourBits::new(io.pins.gpio1, io.pins.gpio2, io.pins.gpio3, io.pins.gpio4);
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let parl_io = ParlIoRxOnly::new(
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peripherals.PARL_IO,
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dma_channel.configure(
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false,
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&mut tx_descriptors,
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&mut rx_descriptors,
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DmaPriority::Priority0,
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),
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1u32.MHz(),
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&clocks,
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)
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.unwrap();
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let mut parl_io_rx = parl_io
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.rx
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.with_config(rx_pins, NoClkPin, BitPackOrder::Msb, Some(0xfff))
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.unwrap();
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let mut buffer = dma_buffer();
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buffer.fill(0u8);
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let mut delay = Delay::new(&clocks);
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loop {
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let transfer = parl_io_rx.read_dma(buffer).unwrap();
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// the buffer and driver is moved into the transfer and we can get it back via
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// `wait`
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(buffer, parl_io_rx) = transfer.wait().unwrap();
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println!("Received: {:02x?} ...", &buffer[..30]);
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delay.delay_ms(500u32);
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}
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}
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fn dma_buffer() -> &'static mut [u8; 4092 * 4] {
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static mut BUFFER: [u8; 4092 * 4] = [0u8; 4092 * 4];
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unsafe { &mut BUFFER }
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}
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