mirror of
https://github.com/esp-rs/esp-hal.git
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db409ffe7b
* Unify the system peripheral Whilst the PCR, SYSTEM and DPORT peripherals are different, we currently use them all in the same way. This PR unifies the peripheral name in the hal to `SYSTEM`. The idea is that they all do the same sort of thing, so we can collect them under the same name, and later down the line we can being to expose differences under an extended API. The benifits to this are imo quite big, the examples now are all identical, which makes things easier for esp-wifi, and paves a path towards the multichip hal. Why not do this in the PAC? Imo the pac should be as close to the hardware as possible, and the HAL is where we should abstractions such as this. * changelog
94 lines
2.5 KiB
Rust
94 lines
2.5 KiB
Rust
//! This shows some of the interrupts that can be generated by UART/Serial.
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//! Use a proper serial terminal to connect to the board (espmonitor and
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//! espflash won't work)
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#![no_std]
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#![no_main]
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use core::{cell::RefCell, fmt::Write};
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use critical_section::Mutex;
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use esp32h2_hal::{
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clock::ClockControl,
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interrupt,
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peripherals::{self, Peripherals, UART0},
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prelude::*,
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riscv,
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timer::TimerGroup,
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uart::config::AtCmdConfig,
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Cpu,
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Uart,
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};
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use esp_backtrace as _;
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use nb::block;
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static SERIAL: Mutex<RefCell<Option<Uart<UART0>>>> = Mutex::new(RefCell::new(None));
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take();
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let system = peripherals.SYSTEM.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks);
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let mut timer0 = timer_group0.timer0;
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let mut uart0 = Uart::new(peripherals.UART0, &clocks);
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uart0.set_at_cmd(AtCmdConfig::new(None, None, None, b'#', None));
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uart0.set_rx_fifo_full_threshold(30).unwrap();
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uart0.listen_at_cmd();
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uart0.listen_rx_fifo_full();
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timer0.start(1u64.secs());
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critical_section::with(|cs| SERIAL.borrow_ref_mut(cs).replace(uart0));
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interrupt::enable(
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peripherals::Interrupt::UART0,
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interrupt::Priority::Priority1,
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)
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.unwrap();
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interrupt::set_kind(
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Cpu::ProCpu,
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interrupt::CpuInterrupt::Interrupt1, // Interrupt 1 handles priority one interrupts
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interrupt::InterruptKind::Edge,
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);
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unsafe {
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riscv::interrupt::enable();
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}
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loop {
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critical_section::with(|cs| {
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writeln!(SERIAL.borrow_ref_mut(cs).as_mut().unwrap(), "Hello World! Send a single `#` character or send at least 30 characters and see the interrupts trigger.").ok();
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});
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block!(timer0.wait()).unwrap();
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}
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}
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#[interrupt]
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fn UART0() {
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critical_section::with(|cs| {
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let mut serial = SERIAL.borrow_ref_mut(cs);
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let serial = serial.as_mut().unwrap();
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let mut cnt = 0;
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while let nb::Result::Ok(_c) = serial.read() {
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cnt += 1;
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}
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writeln!(serial, "Read {} bytes", cnt,).ok();
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writeln!(
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serial,
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"Interrupt AT-CMD: {} RX-FIFO-FULL: {}",
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serial.at_cmd_interrupt_set(),
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serial.rx_fifo_full_interrupt_set(),
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)
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.ok();
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serial.reset_at_cmd_interrupt();
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serial.reset_rx_fifo_full_interrupt();
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});
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}
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