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https://github.com/esp-rs/esp-hal.git
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* GPIO Refactoring * CHANGELOG.md * Addressed review comments * Use `Level` instead of plain bool in public API * Let drivers enable analog functions
148 lines
4.0 KiB
Rust
148 lines
4.0 KiB
Rust
//! UART Test
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//!
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//! Folowing pins are used:
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//! TX GPIP2
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//! RX GPIO4
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//!
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//! Connect TX (GPIO2) and RX (GPIO4) pins.
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//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
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#![no_std]
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#![no_main]
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use defmt_rtt as _;
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use embedded_hal_02::serial::{Read, Write};
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use esp_backtrace as _;
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use esp_hal::{
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clock::{ClockControl, Clocks},
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gpio::Io,
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peripherals::{Peripherals, UART0},
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prelude::*,
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system::SystemControl,
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uart::{config::Config, ClockSource, TxRxPins, Uart},
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Blocking,
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};
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use nb::block;
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struct Context {
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clocks: Clocks<'static>,
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uart: Uart<'static, UART0, Blocking>,
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}
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impl Context {
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pub fn init() -> Self {
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let peripherals = Peripherals::take();
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let system = SystemControl::new(peripherals.SYSTEM);
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
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let pins = TxRxPins::new_tx_rx(io.pins.gpio2, io.pins.gpio4);
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let uart = Uart::new_with_config(
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peripherals.UART0,
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Config::default(),
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Some(pins),
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&clocks,
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None,
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);
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Context { clocks, uart }
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}
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}
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#[cfg(test)]
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#[embedded_test::tests]
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mod tests {
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use defmt::assert_eq;
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use super::*;
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#[init]
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fn init() -> Context {
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Context::init()
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}
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#[test]
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#[timeout(3)]
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fn test_send_receive(mut ctx: Context) {
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ctx.uart.write(0x42).ok();
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let read = block!(ctx.uart.read());
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assert_eq!(read, Ok(0x42));
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}
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#[test]
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#[timeout(3)]
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fn test_send_receive_buffer(mut ctx: Context) {
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const BUF_SIZE: usize = 128; // UART_FIFO_SIZE
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let data = [13; BUF_SIZE];
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let written = ctx.uart.write_bytes(&data).unwrap();
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assert_eq!(written, BUF_SIZE);
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let mut buffer = [0; BUF_SIZE];
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let mut i = 0;
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while i < BUF_SIZE {
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match ctx.uart.read() {
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Ok(byte) => {
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buffer[i] = byte;
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i += 1;
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}
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Err(nb::Error::WouldBlock) => continue,
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Err(nb::Error::Other(_)) => panic!(),
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}
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}
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assert_eq!(data, buffer);
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}
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#[test]
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#[timeout(3)]
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fn test_send_receive_different_baud_rates_and_clock_sources(mut ctx: Context) {
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// The default baud rate for the UART is 115,200, so we will try to
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// send/receive with some other common baud rates to ensure this is
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// working as expected. We will also using different clock sources
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// while we're at it.
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#[cfg(not(feature = "esp32s2"))]
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{
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#[cfg(not(feature = "esp32c3"))]
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{
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// 9600 baud, RC FAST clock source:
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ctx.uart.change_baud(9600, ClockSource::RcFast, &ctx.clocks);
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ctx.uart.write(7).ok();
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let read = block!(ctx.uart.read());
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assert_eq!(read, Ok(7));
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}
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// 19,200 baud, XTAL clock source:
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ctx.uart.change_baud(19_200, ClockSource::Xtal, &ctx.clocks);
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ctx.uart.write(55).ok();
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let read = block!(ctx.uart.read());
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assert_eq!(read, Ok(55));
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// 921,600 baud, APB clock source:
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ctx.uart.change_baud(921_600, ClockSource::Apb, &ctx.clocks);
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ctx.uart.write(253).ok();
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let read = block!(ctx.uart.read());
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assert_eq!(read, Ok(253));
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}
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#[cfg(feature = "esp32s2")]
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{
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// 9600 baud, REF TICK clock source:
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ctx.uart
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.change_baud(9600, ClockSource::RefTick, &ctx.clocks);
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ctx.uart.write(7).ok();
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let read = block!(ctx.uart.read());
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assert_eq!(read, Ok(7));
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// 921,600 baud, APB clock source:
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ctx.uart.change_baud(921_600, ClockSource::Apb, &ctx.clocks);
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ctx.uart.write(253).ok();
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let read = block!(ctx.uart.read());
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assert_eq!(read, Ok(253));
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}
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}
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}
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