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https://github.com/esp-rs/esp-hal.git
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* Remove OutputOpenDrain * Remove input-related functions from Output * Fix documentation * Improve docs
172 lines
4.8 KiB
Rust
172 lines
4.8 KiB
Rust
//! SPI slave mode test suite.
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//!
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//! ESP32 does not support Modes 0 and 2 (properly, at least), so here we're
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//! testing Mode 1.
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//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
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//% FEATURES: unstable
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#![no_std]
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#![no_main]
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use esp_hal::{
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dma_buffers,
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gpio::{Input, InputConfig, Level, Output, OutputConfig, Pull},
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peripheral::Peripheral,
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spi::{slave::Spi, Mode},
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Blocking,
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};
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use hil_test as _;
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cfg_if::cfg_if! {
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if #[cfg(any(esp32, esp32s2))] {
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type DmaChannel = esp_hal::dma::Spi2DmaChannel;
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} else {
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type DmaChannel = esp_hal::dma::DmaChannel0;
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}
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}
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struct Context {
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spi: Spi<'static, Blocking>,
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dma_channel: DmaChannel,
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bitbang_spi: BitbangSpi,
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}
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struct BitbangSpi {
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sclk: Output<'static>,
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mosi: Output<'static>,
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miso: Input<'static>,
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cs: Output<'static>,
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}
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impl BitbangSpi {
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fn new(
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sclk: Output<'static>,
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mosi: Output<'static>,
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miso: Input<'static>,
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cs: Output<'static>,
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) -> Self {
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Self {
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sclk,
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mosi,
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miso,
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cs,
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}
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}
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fn assert_cs(&mut self) {
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self.sclk.set_level(Level::Low);
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self.cs.set_level(Level::Low);
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}
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fn deassert_cs(&mut self) {
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self.sclk.set_level(Level::Low);
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self.cs.set_level(Level::High);
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}
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// Mode 1, so sampled on the rising edge and set on the falling edge.
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fn shift_bit(&mut self, bit: bool) -> bool {
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self.mosi.set_level(Level::from(bit));
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self.sclk.set_level(Level::High);
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let miso = self.miso.level().into();
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self.sclk.set_level(Level::Low);
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miso
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}
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// Shift a byte out and in, MSB first.
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fn shift_byte(&mut self, byte: u8) -> u8 {
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let mut out = 0;
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for i in 0..8 {
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let shift = 7 - i;
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out |= (self.shift_bit((byte >> shift) & 1 != 0) as u8) << shift;
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}
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out
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}
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fn transfer_buf(&mut self, rx: &mut [u8], tx: &[u8]) {
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self.assert_cs();
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for (tx, rx) in tx.iter().zip(rx.iter_mut()) {
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*rx = self.shift_byte(*tx);
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}
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self.deassert_cs();
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}
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}
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#[cfg(test)]
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#[embedded_test::tests(default_timeout = 10, executor = hil_test::Executor::new())]
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mod tests {
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use super::*;
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#[init]
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fn init() -> Context {
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let peripherals = esp_hal::init(esp_hal::Config::default());
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let (mosi_pin, miso_pin) = hil_test::i2c_pins!(peripherals);
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let (sclk_pin, _) = hil_test::common_test_pins!(peripherals);
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let cs_pin = hil_test::unconnected_pin!(peripherals);
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cfg_if::cfg_if! {
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if #[cfg(pdma)] {
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let dma_channel = peripherals.DMA_SPI2;
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} else {
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let dma_channel = peripherals.DMA_CH0;
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}
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}
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let mosi_gpio = Output::new(mosi_pin, Level::Low, OutputConfig::default());
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let cs_gpio = Output::new(cs_pin, Level::High, OutputConfig::default());
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let sclk_gpio = Output::new(sclk_pin, Level::Low, OutputConfig::default());
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let miso_gpio = Input::new(miso_pin, InputConfig::default().with_pull(Pull::None));
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let cs = cs_gpio.peripheral_input();
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let sclk = sclk_gpio.peripheral_input();
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let mosi = mosi_gpio.peripheral_input();
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let miso = unsafe { miso_gpio.clone_unchecked() }.into_peripheral_output();
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Context {
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spi: Spi::new(peripherals.SPI2, Mode::_1)
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.with_sck(sclk)
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.with_mosi(mosi)
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.with_miso(miso)
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.with_cs(cs),
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bitbang_spi: BitbangSpi::new(sclk_gpio, mosi_gpio, miso_gpio, cs_gpio),
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dma_channel,
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}
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}
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#[test]
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fn test_basic(mut ctx: Context) {
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const DMA_SIZE: usize = 32;
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let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(DMA_SIZE);
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let mut spi = ctx
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.spi
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.with_dma(ctx.dma_channel, rx_descriptors, tx_descriptors);
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let slave_send = tx_buffer;
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let slave_receive = rx_buffer;
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// The transfer stops if the buffers are full, not when the master
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// deasserts CS. Therefore, these need to be the same size as the DMA buffers.
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let master_send = &mut [0u8; DMA_SIZE];
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let master_receive = &mut [0xFFu8; DMA_SIZE];
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for (i, v) in master_send.iter_mut().enumerate() {
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*v = (i % 255) as u8;
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}
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for (i, v) in slave_send.iter_mut().enumerate() {
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*v = (254 - (i % 255)) as u8;
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}
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slave_receive.fill(0xFF);
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let transfer = spi.transfer(slave_receive, &slave_send).unwrap();
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ctx.bitbang_spi.transfer_buf(master_receive, master_send);
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transfer.wait().unwrap();
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assert_eq!(slave_receive, master_send);
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assert_eq!(master_receive, slave_send);
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}
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}
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