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* Midterm AES rework * Update esp-hal/src/aes/mod.rs Co-authored-by: Dominic Fischer <14130965+Dominaezzz@users.noreply.github.com> * Update esp-hal/MIGRATING-1.0.0-rc.0.md Co-authored-by: Dominic Fischer <14130965+Dominaezzz@users.noreply.github.com> * Panic on wrong size --------- Co-authored-by: Dominic Fischer <14130965+Dominaezzz@users.noreply.github.com>
86 lines
2.2 KiB
Rust
86 lines
2.2 KiB
Rust
//! AES Test
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//% CHIPS: esp32 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
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//% FEATURES: unstable
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#![no_std]
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#![no_main]
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esp_bootloader_esp_idf::esp_app_desc!();
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const fn pad_to<const K: usize>(input: &[u8]) -> [u8; K] {
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let mut out = [0; K];
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let in_bytes = input.len();
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assert!(in_bytes <= K);
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let mut i = 0;
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while i < in_bytes {
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out[i] = input[i];
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i += 1;
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}
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out
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}
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#[cfg(test)]
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#[embedded_test::tests(default_timeout = 3)]
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mod tests {
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use esp_hal::{
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Config,
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aes::{Aes, Key},
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clock::CpuClock,
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};
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use hil_test as _;
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use super::*;
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const KEY: &[u8] = b"SUp4SeCp@sSw0rd";
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const PLAINTEXT: &[u8] = b"message";
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const PLAINTEXT_BUF: [u8; 16] = pad_to::<16>(PLAINTEXT);
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const CIPHERTEXT_ECB_128: [u8; 16] = [
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0xb3, 0xc8, 0xd2, 0x3b, 0xa7, 0x36, 0x5f, 0x18, 0x61, 0x70, 0x0, 0x3e, 0xd9, 0x3a, 0x31,
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0x96,
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];
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#[cfg(any(esp32, esp32s2))]
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const CIPHERTEXT_ECB_192: [u8; 16] = [
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0x79, 0x88, 0x3f, 0x9d, 0x67, 0x27, 0xf4, 0x18, 0x3, 0xe3, 0xc6, 0x6a, 0x2e, 0x76, 0xb6,
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0xf7,
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];
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const CIPHERTEXT_ECB_256: [u8; 16] = [
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0x0, 0x63, 0x3f, 0x02, 0xa4, 0x53, 0x09, 0x72, 0x20, 0x6d, 0xc9, 0x08, 0x7c, 0xe5, 0xfd,
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0xc,
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];
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#[test]
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fn test_aes_block_operation() {
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fn test_aes_block<const K: usize>(
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aes: &mut Aes<'_>,
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plaintext: [u8; 16],
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ciphertext: [u8; 16],
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) where
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Key: From<[u8; K]>,
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{
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let mut block_buf = plaintext;
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aes.encrypt(&mut block_buf, pad_to::<K>(KEY));
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assert_eq!(&block_buf[..ciphertext.len()], ciphertext);
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let mut block_buf = ciphertext;
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aes.decrypt(&mut block_buf, pad_to::<K>(KEY));
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assert_eq!(&block_buf[..plaintext.len()], plaintext);
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}
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let p = esp_hal::init(Config::default().with_cpu_clock(CpuClock::max()));
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let mut aes = Aes::new(p.AES);
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test_aes_block::<16>(&mut aes, PLAINTEXT_BUF, CIPHERTEXT_ECB_128);
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#[cfg(any(esp32, esp32s2))]
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test_aes_block::<24>(&mut aes, PLAINTEXT_BUF, CIPHERTEXT_ECB_192);
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test_aes_block::<32>(&mut aes, PLAINTEXT_BUF, CIPHERTEXT_ECB_256);
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}
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}
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