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* Remove configure_for_async * Add into_async and into_blocking to I2c * Add into_async and into_blocking to UsbSerialJtag * Rework LCD_CAM * Rmt * RSA * TWAI * Uart * Documentation * Disable interrupts set on other core * Move configure into RegisterAccess * Disable interrupts on the other core * Use EnumSet in RMT
53 lines
1.2 KiB
Rust
53 lines
1.2 KiB
Rust
//! UART TX/RX Async Test
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//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
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//% FEATURES: generic-queue
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#![no_std]
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#![no_main]
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use esp_hal::{
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gpio::Io,
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uart::{UartRx, UartTx},
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Async,
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};
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use hil_test as _;
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struct Context {
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rx: UartRx<'static, Async>,
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tx: UartTx<'static, Async>,
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}
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#[cfg(test)]
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#[embedded_test::tests(executor = esp_hal_embassy::Executor::new())]
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mod tests {
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use super::*;
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#[init]
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async fn init() -> Context {
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let peripherals = esp_hal::init(esp_hal::Config::default());
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let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
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let (rx, tx) = hil_test::common_test_pins!(io);
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let tx = UartTx::new(peripherals.UART0, tx).unwrap().into_async();
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let rx = UartRx::new(peripherals.UART1, rx).unwrap().into_async();
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Context { rx, tx }
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}
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#[test]
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#[timeout(3)]
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async fn test_send_receive(mut ctx: Context) {
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let byte = [0x42];
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let mut read = [0u8; 1];
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ctx.tx.flush_async().await.unwrap();
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ctx.tx.write_async(&byte).await.unwrap();
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let _ = ctx.rx.read_async(&mut read).await;
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assert_eq!(read, byte);
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}
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}
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