mirror of
https://github.com/esp-rs/esp-hal.git
synced 2025-09-28 21:00:59 +00:00

* Run test with multiple timeouts * Align hw_bus_clear option with esp-idf * Generate stop condition after HW bus clearing * Tweak software bus clearing algo * Make sure I2C is always reset * Properly set finished flag even on timeouts * Fix reset/clear interactions * Add a note about blocking in Drop * Add changelog entry
362 lines
11 KiB
Rust
362 lines
11 KiB
Rust
//! I2C test
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//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
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//% FEATURES: unstable embassy
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#![no_std]
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#![no_main]
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use embassy_futures::select::{Either, select};
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use embassy_time::{Duration, Ticker};
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use esp_hal::{
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Async,
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Blocking,
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i2c::master::{
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AcknowledgeCheckFailedReason,
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Config,
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Error,
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I2c,
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I2cAddress,
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Operation,
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SoftwareTimeout,
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},
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interrupt::{
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Priority,
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software::{SoftwareInterrupt, SoftwareInterruptControl},
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},
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time,
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};
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use esp_hal_embassy::InterruptExecutor;
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use hil_test::mk_static;
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struct Context {
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interrupt: SoftwareInterrupt<'static, 1>,
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i2c: I2c<'static, Blocking>,
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}
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fn _async_driver_is_compatible_with_blocking_ehal() {
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fn _with_driver(driver: I2c<'static, Async>) {
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_with_ehal(driver);
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}
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fn _with_ehal(_: impl embedded_hal::i2c::I2c) {}
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}
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// Daniel's test device:
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// const DUT_ADDRESS: u8 = 0x29;
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// const READ_DATA_COMMAND: &[u8] = &[0, 0];
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// HIL test device:
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const DUT_ADDRESS: u8 = 0x77;
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const READ_DATA_COMMAND: &[u8] = &[0xaa];
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const NON_EXISTENT_ADDRESS: u8 = 0x6b;
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#[embassy_executor::task]
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async fn waiting_blocking_task() {
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esp_hal::delay::Delay::new().delay_millis(10);
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}
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#[cfg(test)]
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#[embedded_test::tests(default_timeout = 3, executor = hil_test::Executor::new())]
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mod tests {
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use super::*;
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#[init]
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fn init() -> Context {
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let peripherals = esp_hal::init(esp_hal::Config::default());
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hil_test::init_embassy!(peripherals, 2);
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let (sda, scl) = hil_test::i2c_pins!(peripherals);
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let sw_ints = SoftwareInterruptControl::new(peripherals.SW_INTERRUPT);
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// Create a new peripheral object with the described wiring and standard
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// I2C clock speed:
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let i2c = I2c::new(peripherals.I2C0, Config::default())
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.unwrap()
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.with_sda(sda)
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.with_scl(scl);
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Context {
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i2c,
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interrupt: sw_ints.software_interrupt1,
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}
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}
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#[test]
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fn invalid_address_returns_error(mut ctx: Context) {
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assert_eq!(
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ctx.i2c.write(0x80, &[]),
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Err(Error::AddressInvalid(I2cAddress::SevenBit(0x80)))
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);
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assert_eq!(
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ctx.i2c.read(0x80, &mut [0; 1]),
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Err(Error::AddressInvalid(I2cAddress::SevenBit(0x80)))
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);
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assert_eq!(
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ctx.i2c.write_read(0x80, &[0x77], &mut [0; 1]),
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Err(Error::AddressInvalid(I2cAddress::SevenBit(0x80)))
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);
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}
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#[test]
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fn empty_write_returns_ack_error_for_unknown_address(mut ctx: Context) {
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// on some chips we can determine the ack-check-failed reason but not on all
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// chips
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let reason = if cfg!(any(esp32, esp32s2, esp32c2, esp32c3)) {
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AcknowledgeCheckFailedReason::Unknown
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} else {
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AcknowledgeCheckFailedReason::Address
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};
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assert_eq!(
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ctx.i2c.write(NON_EXISTENT_ADDRESS, &[]),
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Err(Error::AcknowledgeCheckFailed(reason))
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);
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assert_eq!(ctx.i2c.write(DUT_ADDRESS, &[]), Ok(()));
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}
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#[test]
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fn test_read_cali(mut ctx: Context) {
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let mut read_data = [0u8; 22];
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// have a failing read which might could leave the peripheral in an undesirable
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// state
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ctx.i2c
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.write_read(NON_EXISTENT_ADDRESS, &[0xaa], &mut read_data)
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.expect_err("Expected error for non-existent address");
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// do the real read which should succeed
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ctx.i2c
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.write_read(DUT_ADDRESS, READ_DATA_COMMAND, &mut read_data)
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.unwrap();
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assert_ne!(read_data, [0u8; 22])
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}
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#[test]
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fn test_read_cali_with_transactions(mut ctx: Context) {
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let mut read_data = [0u8; 22];
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// do the real read which should succeed
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ctx.i2c
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.transaction(
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DUT_ADDRESS,
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&mut [
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Operation::Write(READ_DATA_COMMAND),
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Operation::Read(&mut read_data),
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],
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)
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.unwrap();
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assert_ne!(read_data, [0u8; 22])
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}
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#[test]
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async fn async_empty_write_returns_ack_error_for_unknown_address(ctx: Context) {
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let mut i2c = ctx.i2c.into_async();
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// on some chips we can determine the ack-check-failed reason but not on all
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// chips
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let reason = if cfg!(any(esp32, esp32s2, esp32c2, esp32c3)) {
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AcknowledgeCheckFailedReason::Unknown
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} else {
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AcknowledgeCheckFailedReason::Address
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};
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let should_fail = i2c.write_async(NON_EXISTENT_ADDRESS, &[]).await;
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assert_eq!(should_fail, Err(Error::AcknowledgeCheckFailed(reason)));
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assert_eq!(i2c.write_async(DUT_ADDRESS, &[]).await, Ok(()));
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}
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#[test]
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async fn async_test_read_cali(ctx: Context) {
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let mut i2c = ctx.i2c.into_async();
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let mut read_data = [0u8; 22];
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// have a failing read which might could leave the peripheral in an undesirable
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// state
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i2c.write_read_async(NON_EXISTENT_ADDRESS, &[0xaa], &mut read_data)
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.await
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.expect_err("Expected error for non-existent address");
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// do the real read which should succeed
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i2c.write_read_async(DUT_ADDRESS, READ_DATA_COMMAND, &mut read_data)
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.await
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.unwrap();
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assert_ne!(read_data, [0u8; 22])
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}
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#[test]
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async fn async_test_read_cali_with_transactions(ctx: Context) {
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let mut i2c = ctx.i2c.into_async();
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let mut read_data = [0u8; 22];
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// do the real read which should succeed
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i2c.transaction_async(
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DUT_ADDRESS,
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&mut [
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Operation::Write(READ_DATA_COMMAND),
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Operation::Read(&mut read_data),
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],
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)
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.await
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.unwrap();
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assert_ne!(read_data, [0u8; 22])
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}
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#[test]
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async fn async_cancellation(ctx: Context) {
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let mut i2c = ctx.i2c.into_async();
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// Read a lot of data to ensure that the transaction is cancelled mid-transfer.
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let mut read_data = [0u8; 220];
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for n_yield in 1..20 {
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defmt::info!("Running transaction to be cancelled");
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// Start a transaction that will be cancelled.
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let select_result = select(
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i2c.transaction_async(
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DUT_ADDRESS,
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&mut [
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Operation::Write(READ_DATA_COMMAND),
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Operation::Read(&mut read_data),
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],
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),
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async {
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// Let the transaction run for a tiny bit.
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for _ in 0..n_yield {
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embassy_futures::yield_now().await;
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}
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},
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)
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.await;
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if matches!(select_result, Either::First(Ok(_))) {
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break;
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}
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// Assert that the I2C transaction was cancelled.
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hil_test::assert!(
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matches!(select_result, Either::Second(_)),
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"({}) Transaction completed with {:?}",
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n_yield,
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select_result
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);
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defmt::info!("Transaction cancelled");
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}
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let mut read_data = [0u8; 22];
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// do the real read which should succeed
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i2c.transaction_async(
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DUT_ADDRESS,
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&mut [
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Operation::Write(READ_DATA_COMMAND),
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Operation::Read(&mut read_data),
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],
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)
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.await
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.unwrap();
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assert_ne!(read_data, [0u8; 22])
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}
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#[test]
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async fn test_timeout_when_scl_kept_low(ctx: Context) {
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let mut i2c = ctx.i2c.into_async();
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i2c.apply_config(
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&Config::default()
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.with_software_timeout(SoftwareTimeout::PerByte(time::Duration::from_millis(10))),
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)
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.unwrap();
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esp_hal::gpio::InputSignal::I2CEXT0_SCL.connect_to(&esp_hal::gpio::Level::Low);
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let mut read_data = [0u8; 22];
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// will run into an error but it should return at least
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i2c.write_read(DUT_ADDRESS, READ_DATA_COMMAND, &mut read_data)
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.expect_err("Expected timeout error");
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}
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#[test]
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#[cfg(i2c_master_has_fsm_timeouts)]
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async fn test_timeout_when_scl_kept_low_with_fsm_timeout(ctx: Context) {
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let mut i2c = ctx.i2c.into_async();
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i2c.apply_config(
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&Config::default()
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.with_scl_st_timeout(esp_hal::i2c::master::FsmTimeout::new_const::<16>()),
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)
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.unwrap();
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esp_hal::gpio::InputSignal::I2CEXT0_SCL.connect_to(&esp_hal::gpio::Level::Low);
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let mut read_data = [0u8; 22];
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// will run into an error but it should return at least
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i2c.write_read(DUT_ADDRESS, READ_DATA_COMMAND, &mut read_data)
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.expect_err("Expected timeout error");
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}
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#[test]
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async fn async_test_timeout_when_scl_kept_low(ctx: Context) {
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let mut i2c = ctx.i2c.into_async();
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i2c.apply_config(
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&Config::default()
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.with_software_timeout(SoftwareTimeout::PerByte(time::Duration::from_millis(10))),
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)
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.unwrap();
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esp_hal::gpio::InputSignal::I2CEXT0_SCL.connect_to(&esp_hal::gpio::Level::Low);
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let mut read_data = [0u8; 22];
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// will run into an error but it should return at least
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i2c.write_read_async(DUT_ADDRESS, READ_DATA_COMMAND, &mut read_data)
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.await
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.expect_err("Expected timeout error");
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}
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#[test]
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#[timeout(10)]
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async fn no_timeout_when_preempted_for_long_time(ctx: Context) {
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let mut i2c = ctx.i2c.into_async();
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let interrupt_executor =
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mk_static!(InterruptExecutor<1>, InterruptExecutor::new(ctx.interrupt));
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let spawner = interrupt_executor.start(Priority::Priority3);
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let mut ticker = Ticker::every(Duration::from_millis(10));
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for i in 0..100 {
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let mut read_data = [0u8; 22];
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let result = embassy_futures::join::join(
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i2c.write_read_async(DUT_ADDRESS, READ_DATA_COMMAND, &mut read_data),
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async {
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for _ in 0..4 {
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spawner.must_spawn(waiting_blocking_task());
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embassy_futures::yield_now().await;
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}
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},
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)
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.await;
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assert!(
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result.0.is_ok(),
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"I2C read failed: {:?} in iteration {}",
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result.0,
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i
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);
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ticker.next().await;
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}
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}
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}
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