esp-hal/esp32c6-hal/examples/rtc_watchdog.rs
Jesse Braham 4dd9fbdb7b
Disable all watchdog timers at startup by default (#763)
* Rework watchdog timer drivers to allow enabling/disabling and feeding without traits

* Disable all watchdogs prior to `main` using the `__post_init` hook

* Update all watchdog-related examples

* Update CHANGELOG

* Address review comment
2023-08-30 08:54:01 -07:00

66 lines
1.5 KiB
Rust

//! This demos the RTC Watchdog Timer (RWDT).
//! The RWDT is initially configured to trigger an interrupt after a given
//! timeout. Then, upon expiration, the RWDT is restarted and then reconfigured
//! to reset both the main system and the RTC.
#![no_std]
#![no_main]
use core::cell::RefCell;
use critical_section::Mutex;
use esp32c6_hal::{
clock::ClockControl,
interrupt,
peripherals::{self, Peripherals},
prelude::*,
riscv,
Rtc,
Rwdt,
};
use esp_backtrace as _;
static RWDT: Mutex<RefCell<Option<Rwdt>>> = Mutex::new(RefCell::new(None));
#[entry]
fn main() -> ! {
let peripherals = Peripherals::take();
let system = peripherals.PCR.split();
let _clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let mut rtc = Rtc::new(peripherals.LP_CLKRST);
rtc.rwdt.start(2000u64.millis());
rtc.rwdt.listen();
interrupt::enable(
peripherals::Interrupt::LP_WDT,
interrupt::Priority::Priority1,
)
.unwrap();
critical_section::with(|cs| RWDT.borrow_ref_mut(cs).replace(rtc.rwdt));
unsafe {
riscv::interrupt::enable();
}
loop {}
}
#[interrupt]
fn LP_WDT() {
critical_section::with(|cs| {
esp_println::println!("RWDT Interrupt");
let mut rwdt = RWDT.borrow_ref_mut(cs);
let rwdt = rwdt.as_mut().unwrap();
rwdt.clear_interrupt();
esp_println::println!("Restarting in 5 seconds...");
rwdt.start(5000u64.millis());
rwdt.unlisten();
});
}