
* Minimal architecture for split RCC. * Removed critical section. * Add all modem clock controllers and adjust esp-ieee802154. * Fixed incorrect cfg. * Fixed unstable attribute usage. * Replaced AtomicU8 with Cell<u8> * Reverted example channel back to 15 * Added unstable attribute to ModemClockController impls. * Remember to actually increase the ref count. * Experimentally removed RadioClockController * Merged ref counters and made decrease panic if zero is reached. * Removed RADIO_CLK peripheral. * Removed RADIO_CLK again. * Revert "Removed RADIO_CLK again." This reverts commit 6da2d2834850068aa21bc52b141de2cfd8154acc. * Removed RADIO_CLK without reformatting the files. * Applied changes to examples and hil-tests. * Fixed OS adapter for C2 and H2 * Adjusted docs and used unwrap! * Fixed comments. * Added changelog. * Fixed esp-wifi for esp32h2. * Changed comment for PHY_CLOCK_REF_COUNTER. * Fixed lint for esp32c2. * Update esp-hal/src/clock/mod.rs Co-authored-by: Dániel Buga <bugadani@gmail.com> * Update esp-hal/src/clock/mod.rs Co-authored-by: Dániel Buga <bugadani@gmail.com> * Removed unnecessary comments and made init_radio_clocks unstable. * Update esp-hal/src/clock/mod.rs Co-authored-by: Dániel Buga <bugadani@gmail.com> * Fixed lint. * Removed clocks_ll functions for chips that don't have those peripherals. * fmt * Changed modem clock controller stealing. * Added lifetime * fixed peripheral stealing again * Made modem_clock_controller not const. * Used type alias instead of function for peripheral stealing. * fmt * Adjusted remaining comments. * Added note about coex. * fmt * misc * Revert "misc" This reverts commit d8740421e0dff84af605160939e246f2308a48e1. * Regenerated esp metadata --------- Co-authored-by: Dániel Buga <bugadani@gmail.com>
hil-test
Hardware-in-loop testing for esp-hal
.
For assistance with this package please open an issue or start a discussion.
Quickstart
We use embedded-test as our testing framework. This allows us to write unit and integration tests much in the same way you would for a normal Rust project, when the standard library is available, and to execute them using Cargo's built-in test runner.
Running Tests Locally
We use probe-rs for flashing and running the tests on a target device, however, this MUST be installed from the correct revision:
cargo install probe-rs-tools \
--git https://github.com/probe-rs/probe-rs \
--rev 9bde591 --force --locked
Target device MUST connected via its USB-Serial-JTAG port, or if unavailable (eg. ESP32, ESP32-C2, ESP32-S2) then you must connect a compatible debug probe such as an ESP-Prog.
You can run all tests for a given device by running the following command from the workspace root:
cargo xtask run-tests $CHIP
To run a single test on a target, run the following command from the workspace root:
# Run GPIO tests for ESP32-C6
cargo xtask run-tests esp32c6 --test gpio
If you want to run a test multiple times:
# Run GPIO tests for ESP32-C6
cargo xtask run-tests esp32c6 --test gpio --repeat 10
Another alternative way of running a single test is, from the hil-tests
folder:
# Run GPIO tests for ESP32-C6
CARGO_BUILD_TARGET=riscv32imac-unknown-none-elf \
PROBE_RS_CHIP=esp32c6 \
cargo +nightly test --features=esp32c6 --test=gpio
- If the
--test
argument is omitted, then all tests will be run, independently if the tests are supported for that target, for this reason, we encourage using thextask
approach. - The build target MUST be specified via the
CARGO_BUILD_TARGET
environment variable or as an argument (--target
). - The chip MUST be specified via the
PROBE_RS_CHIP
environment variable or as an argument ofprobe-rs
(--chip
).
Some tests will require physical connections, please see the current configuration in our runners.
Running Tests Remotes (ie. on Self-Hosted Runners)
The hil.yml
workflow builds the test suite for all our available targets and executes them.
Our self-hosted runners have the following setup:
- ESP32-C2 (
esp32c2-jtag
):- Devkit:
ESP8684-DevKitM-1
connected via UART.GPIO18
andGPIO9
are I2C pins.GPIO2
andGPIO3
are connected.
- Probe:
ESP-Prog
connected with the following connections - RPi: Raspbian 12 configured with the following setup
- Devkit:
- ESP32-C3 (
rustboard
):- Devkit:
ESP32-C3-DevKit-RUST-1
connected via USB-Serial-JTAG.GPIO4
andGPIO5
are I2C pins.GPIO2
andGPIO3
are connected.
- RPi: Raspbian 12 configured with the following setup
- Devkit:
- ESP32-C6 (
esp32c6-usb
):- Devkit:
ESP32-C6-DevKitC-1 V1.2
connected via USB-Serial-JTAG (USB
port).GPIO6
andGPIO7
are I2C pins.GPIO2
andGPIO3
are connected.
- RPi: Raspbian 12 configured with the following setup
- Devkit:
- ESP32-H2 (
esp32h2-usb
):- Devkit:
ESP32-H2-DevKitM-1
connected via USB-Serial-JTAG (USB
port).GPIO12
andGPIO22
are I2C pins.GPIO2
andGPIO3
are connected.
- RPi: Raspbian 12 configured with the following setup
- Devkit:
- ESP32-S2 (
esp32s2-jtag
):- Devkit:
ESP32-S2-Saola-1
connected via UART.GPIO2
andGPIO3
are I2C pins.GPIO9
andGPIO10
are connected.
- Probe:
ESP-Prog
connected with the following connections - RPi: Raspbian 12 configured with the following setup
- Devkit:
- ESP32-S3 (
esp32s3-usb
):- Devkit:
ESP32-S3-DevKitC-1
connected via USB-Serial-JTAG.GPIO2
andGPIO3
are I2C pins.GPIO9
andGPIO10
are connected.
- RPi: Raspbian 12 configured with the following setup
- Devkit:
- ESP32 (
esp32-jtag
):- Devkit:
ESP32-DevKitC-V4
connected via UART.GPIO32
andGPIO33
are I2C pins.GPIO2
andGPIO4
are connected.
- Probe:
ESP-Prog
connected with the following connections - RPi: Raspbian 12 configured with the following setup
- Devkit:
RPi Setup
# Install Rust:
curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh -s -- --default-toolchain stable -y --profile minimal
# Source the current shell:
. "$HOME/.cargo/env"
# Install dependencies
sudo apt install -y pkg-config libudev-dev uhubctl
# Install probe-rs
cargo install probe-rs-tools --git https://github.com/probe-rs/probe-rs --rev 9bde591 --force
# Add the udev rules
wget -O - https://probe.rs/files/69-probe-rs.rules | sudo tee /etc/udev/rules.d/69-probe-rs.rules > /dev/null
# Add the user to plugdev group
sudo usermod -a -G plugdev $USER
# Install espflash
ARCH=$($HOME/.cargo/bin/rustup show | grep "Default host" | sed -e 's/.* //')
curl -L "https://github.com/esp-rs/espflash/releases/latest/download/espflash-${ARCH}.zip" -o "${HOME}/.cargo/bin/espflash.zip"
unzip "${HOME}/.cargo/bin/espflash.zip" -d "${HOME}/.cargo/bin/"
rm "${HOME}/.cargo/bin/espflash.zip"
chmod u+x "${HOME}/.cargo/bin/espflash"
# Reboot the VM
sudo reboot
Adding New Tests
- Create a new integration test file (
tests/$PERIPHERAL.rs
) - Add a corresponding
[[test]]
entry toCargol.toml
(MUST setharness = false
) - Write the tests
- Document any necessary physical connections on boards connected to self-hosted runners
- Add a header in the test stating which targets support the given tests. Eg:
//! AES Test
//% CHIPS: esp32 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
If the test is supported by all the targets, you can omit the header.
- Write some documentation at the top of the
tests/$PERIPHERAL.rs
file with the pins being used and the required connections, if applicable.
Logging in tests
The tests can use defmt to print logs. To enable log output, add the defmt
feature to the test
you want to run. Eg:
//! AES Test
//% CHIPS: esp32 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
//% FEATURES: defmt
Make sure to remove this addition before you commit any modifications.
NOTE: log output is disabled by default. Enabling it can introduce some timing issues, which makes some tests fail randomly. This issue affects all Xtensa devices, as well as ESP32-C2 and ESP32-C3 currently.