esp-hal/xtensa-lx-rt
Dániel Buga 69776eb638
Even more cargo-batch, encode configs in Cargo.toml (#4134)
* Abstract out LP-core targeting packages

* Encode targets_lp_core in Cargo.toml

* Encode architecture compatibility in Cargo.toml

* Move semver_checked into Cargo.toml

* Cache parsed tomls

* Parse simple feature sets from Cargo.toml

* Move all basic feature rules to Cargo.toml

* Add check configs

* Limit command length on Windows

* Update cargo.rs

* Add clippy configs

* Use a single syntax, use a single doc-config line

* Fix known problems

* Run cargo check in CI command

* Fix more problems

* Fix esp-storage
2025-09-18 16:15:35 +00:00
..
2025-07-09 12:46:22 +00:00
2025-07-03 13:44:27 +00:00

xtensa-lx-rt

Crates.io docs.rs MSRV Crates.io Matrix

Minimal runtime/startup for Xtensa LX processors. This crate currently supports the following CPU's:

Feature Supported CPUs
esp32 ESP32 (LX6)
esp32s2 ESP32-S2 (LX7)
esp32s3 ESP32-S3 (LX7)

I get linker errors when I build for debug

Xtensa only provides a small code space for exceptions to fit inside, when building an unoptimized build the code size of a exception handler may exceed that size, causing a linker error. To fix this, you should always optimize this crate, even in debug builds. Adding the following to your projects Cargo.toml should do the trick.

[profile.dev.package.xtensa-lx-rt]
opt-level = 'z'

Minimum Supported Rust Version (MSRV)

This crate is guaranteed to compile when using the latest stable Rust version at the time of the crate's release. It might compile with older versions, but that may change in any new release, including patches.

License

Licensed under either of

at your option.

Contribution

Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.