esp-hal/esp-lp-hal
Scott Mabin e8b0a376eb
Check all features and targets in CI when linting (#1824)
* Check more features and targets in CI when linting

* Address clippy lints

* Address clippy lints for esp-wifi

* Expand println and storage checks

* Remove uneeded clippy lint

* Check every package for each target

* resolve esp-wifi clippy lints

* use defmt when building esp-wifi

* clean up

* fix warning in meta crate

* simplify CI workflow

* split up clippy jobs
2024-07-24 11:45:41 +00:00
..
2024-05-15 08:49:33 +00:00
2024-07-15 20:23:13 +00:00
2024-07-15 22:56:31 +00:00
2024-03-22 17:11:20 +00:00

esp-lp-hal

Crates.io docs.rs MSRV Crates.io Matrix

Bare-metal (no_std) hardware abstraction layer for the low-power RISC-V coprocessors found in the ESP32-C6, ESP32-S2, and ESP32-S3 from Espressif.

Implements a number of blocking and, where applicable, async traits from the various packages in the embedded-hal repository.

For help getting started with this HAL, please refer to The Rust on ESP Book and the documentation.

Documentation

Supported Devices

Chip Datasheet Technical Reference Manual Target
ESP32-C6 ESP32-C6 ESP32-C6 riscv32imac-unknown-none-elf
ESP32-S2 ESP32-S2 ESP32-S2 riscv32imc-unknown-none-elf
ESP32-S3 ESP32-S3 ESP32-S3 riscv32imc-unknown-none-elf

Minimum Supported Rust Version (MSRV)

This crate is guaranteed to compile on stable Rust 1.76 and up. It might compile with older versions but that may change in any new patch release.

License

Licensed under either of:

at your option.

Contribution

Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.