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* Add interrupt-related examples for the ESP32-H2 * Update CI workflow to actually check `interrupt_preemption` examples
156 lines
4.4 KiB
Rust
156 lines
4.4 KiB
Rust
//! Interrupt Preemption
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//!
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//! An example of how an interrupt can be preempted by another with higher
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//! priority. Should show higher-numbered software interrupts happening during
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//! the handling of lower-numbered ones.
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#![no_std]
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#![no_main]
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use core::cell::RefCell;
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use critical_section::Mutex;
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use esp32h2_hal::{
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clock::ClockControl,
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interrupt::{self},
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peripherals::{self, Peripherals},
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prelude::*,
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riscv,
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system::{SoftwareInterrupt, SoftwareInterruptControl},
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timer::TimerGroup,
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Rtc,
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};
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use esp_backtrace as _;
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static SWINT: Mutex<RefCell<Option<SoftwareInterruptControl>>> = Mutex::new(RefCell::new(None));
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take();
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let mut system = peripherals.PCR.split();
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let clockctrl = system.clock_control;
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let sw_int = system.software_interrupt_control;
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let clocks = ClockControl::boot_defaults(clockctrl).freeze();
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// Disable the watchdog timers. For the ESP32-H2, this includes the Super WDT,
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// the RTC WDT, and the TIMG WDTs.
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let mut rtc = Rtc::new(peripherals.LP_CLKRST);
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let timer_group0 = TimerGroup::new(
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peripherals.TIMG0,
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&clocks,
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&mut system.peripheral_clock_control,
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);
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let mut wdt0 = timer_group0.wdt;
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let timer_group1 = TimerGroup::new(
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peripherals.TIMG1,
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&clocks,
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&mut system.peripheral_clock_control,
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);
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let mut wdt1 = timer_group1.wdt;
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rtc.swd.disable();
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rtc.rwdt.disable();
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wdt0.disable();
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wdt1.disable();
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critical_section::with(|cs| SWINT.borrow_ref_mut(cs).replace(sw_int));
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interrupt::enable(
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peripherals::Interrupt::FROM_CPU_INTR0,
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interrupt::Priority::Priority1,
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)
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.unwrap();
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interrupt::enable(
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peripherals::Interrupt::FROM_CPU_INTR1,
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interrupt::Priority::Priority2,
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)
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.unwrap();
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interrupt::enable(
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peripherals::Interrupt::FROM_CPU_INTR2,
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interrupt::Priority::Priority2,
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)
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.unwrap();
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interrupt::enable(
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peripherals::Interrupt::FROM_CPU_INTR3,
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interrupt::Priority::Priority15,
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)
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.unwrap();
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unsafe { riscv::interrupt::enable() }
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// raise mid priority interrupt.
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// The handler raises one interrupt at lower priority, one at same and one at
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// higher. We expect to see the higher priority served immeiately before
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// exiting the handler Once the handler is exited we expect to see same
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// priority and low priority interrupts served in that order
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critical_section::with(|cs| {
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SWINT
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.borrow_ref_mut(cs)
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.as_mut()
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.unwrap()
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.raise(SoftwareInterrupt::SoftwareInterrupt1);
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});
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loop {}
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}
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#[interrupt]
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fn FROM_CPU_INTR0() {
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esp_println::println!("SW interrupt0");
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critical_section::with(|cs| {
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SWINT
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.borrow_ref_mut(cs)
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.as_mut()
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.unwrap()
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.reset(SoftwareInterrupt::SoftwareInterrupt0);
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});
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}
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#[interrupt]
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fn FROM_CPU_INTR1() {
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esp_println::println!("SW interrupt1 entry");
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critical_section::with(|cs| {
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SWINT
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.borrow_ref_mut(cs)
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.as_mut()
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.unwrap()
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.reset(SoftwareInterrupt::SoftwareInterrupt1);
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SWINT
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.borrow_ref_mut(cs)
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.as_mut()
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.unwrap()
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.raise(SoftwareInterrupt::SoftwareInterrupt2); // raise interrupt at same priority
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SWINT
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.borrow_ref_mut(cs)
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.as_mut()
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.unwrap()
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.raise(SoftwareInterrupt::SoftwareInterrupt3); // raise interrupt at higher priority
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SWINT
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.borrow_ref_mut(cs)
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.as_mut()
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.unwrap()
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.raise(SoftwareInterrupt::SoftwareInterrupt0); // raise interrupt at
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// lower priority
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});
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esp_println::println!("SW interrupt1 exit");
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}
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#[interrupt]
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fn FROM_CPU_INTR2() {
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esp_println::println!("SW interrupt2");
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critical_section::with(|cs| {
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SWINT
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.borrow_ref_mut(cs)
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.as_mut()
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.unwrap()
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.reset(SoftwareInterrupt::SoftwareInterrupt2);
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});
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}
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#[interrupt]
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fn FROM_CPU_INTR3() {
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esp_println::println!("SW interrupt3");
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critical_section::with(|cs| {
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SWINT
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.borrow_ref_mut(cs)
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.as_mut()
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.unwrap()
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.reset(SoftwareInterrupt::SoftwareInterrupt3);
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});
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}
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