mirror of
https://github.com/esp-rs/esp-hal.git
synced 2025-09-30 22:01:11 +00:00
14ac8c3c80
* feat: ✨ Enable RMT peripheral * feat: ✨ Rename RMT GPIOs * feat: ✨ Add clock source, ram size and ram start * feat: ✨ Rename GPIOs * feat: ✨ Add pulse_control example * fix: 🐛 Fix example clock * feat: ✨ Initial support for H2 * fix: 📝 Fix typo * ci: ✨ Enable check on H2 * build: 📌 Update esp-pac revision, use fork * docs: 📝 Update example documentation * docs: 📝 Add todo * docs: 📝 Update changelog * feat: ✨ Add ram example * build: 📌 Update H2 PAC * docs: 📝 Remove todo
108 lines
2.9 KiB
Rust
108 lines
2.9 KiB
Rust
//! This shows how to use RTC memory.
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//! RTC memory is retained during resets and during most sleep modes.
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//! Initialized memory is always re-initialized on startup.
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//! Uninitialzed memory isn't initialized on startup and can be used to keep
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//! data during resets. Zeroed memory is initialized to zero on startup.
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//! We can also run code from RTC memory.
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#![no_std]
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#![no_main]
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use esp32h2_hal::{
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clock::ClockControl,
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macros::ram,
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peripherals::Peripherals,
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prelude::*,
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timer::TimerGroup,
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};
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use esp_backtrace as _;
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use esp_println::println;
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use nb::block;
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#[ram(rtc_fast)]
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static mut SOME_INITED_DATA: [u8; 2] = [0xaa, 0xbb];
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#[ram(rtc_fast, uninitialized)]
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static mut SOME_UNINITED_DATA: [u8; 2] = [0; 2];
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#[ram(rtc_fast, zeroed)]
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static mut SOME_ZEROED_DATA: [u8; 8] = [0; 8];
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take();
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let mut system = peripherals.PCR.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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// Disable the watchdog timers. For the ESP32-H2, this includes the Super WDT,
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// and the TIMG WDTs.
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let timer_group0 = TimerGroup::new(
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peripherals.TIMG0,
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&clocks,
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&mut system.peripheral_clock_control,
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);
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let mut timer0 = timer_group0.timer0;
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let mut wdt0 = timer_group0.wdt;
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let timer_group1 = TimerGroup::new(
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peripherals.TIMG1,
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&clocks,
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&mut system.peripheral_clock_control,
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);
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let mut wdt1 = timer_group1.wdt;
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// Disable MWDT flash boot protection
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wdt0.disable();
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wdt1.disable();
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// The RWDT flash boot protection remains enabled and it being triggered is part
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// of the example
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timer0.start(1u64.secs());
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println!("RAM function located at {:p}", function_in_ram as *const ());
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unsafe {
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println!("SOME_INITED_DATA {:x?}", SOME_INITED_DATA);
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println!("SOME_UNINITED_DATA {:x?}", SOME_UNINITED_DATA);
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println!("SOME_ZEROED_DATA {:x?}", SOME_ZEROED_DATA);
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SOME_INITED_DATA[0] = 0xff;
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SOME_ZEROED_DATA[0] = 0xff;
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println!("SOME_INITED_DATA {:x?}", SOME_INITED_DATA);
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println!("SOME_UNINITED_DATA {:x?}", SOME_UNINITED_DATA);
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println!("SOME_ZEROED_DATA {:x?}", SOME_ZEROED_DATA);
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if SOME_UNINITED_DATA[0] != 0 {
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SOME_UNINITED_DATA[0] = 0;
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SOME_UNINITED_DATA[1] = 0;
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}
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if SOME_UNINITED_DATA[1] == 0xff {
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SOME_UNINITED_DATA[1] = 0;
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}
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println!("Counter {}", SOME_UNINITED_DATA[1]);
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SOME_UNINITED_DATA[1] += 1;
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}
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println!(
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"RTC_FAST function located at {:p}",
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function_in_rtc_ram as *const ()
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);
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println!("Result {}", function_in_rtc_ram());
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loop {
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function_in_ram();
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block!(timer0.wait()).unwrap();
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}
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}
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#[ram]
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fn function_in_ram() {
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println!("Hello world!");
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}
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#[ram(rtc_fast)]
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fn function_in_rtc_ram() -> u32 {
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42
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}
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