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64 lines
1.6 KiB
Plaintext
64 lines
1.6 KiB
Plaintext
/* before memory.x to allow override */
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ENTRY(ESP32Reset)
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INCLUDE memory.x
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/* after memory.x to allow override */
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PROVIDE(__pre_init = DefaultPreInit);
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PROVIDE(__zero_bss = default_mem_hook);
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PROVIDE(__init_data = default_mem_hook);
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INCLUDE exception.x
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/* map generic regions to output sections */
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INCLUDE "alias.x"
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/* ESP32S3 fixups */
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SECTIONS {
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.rwdata_dummy (NOLOAD) :
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{
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/* This dummy section represents the .rwtext section but in RWDATA.
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* Thus, it must have its alignment and (at least) its size.
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*/
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/* Start at the same alignment constraint than .flash.text */
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. = ALIGN(ALIGNOF(.rwtext));
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/* Create an empty gap as big as .rwtext section - 32k (SRAM0)
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* because SRAM1 is available on the data bus and instruction bus
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*/
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. = MAX(SIZEOF(.rwtext) + SIZEOF(.rwtext.wifi) + RESERVE_ICACHE + VECTORS_SIZE, 32k) - 32k;
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/* Prepare the alignment of the section above. */
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. = ALIGN(4);
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_rwdata_reserved_start = .;
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} > RWDATA
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}
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INSERT BEFORE .data;
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INCLUDE "fixups/rodata_dummy.x"
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INCLUDE "fixups/rtc_fast_rwdata_dummy.x"
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/* End of ESP32S3 fixups */
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/* Shared sections - ordering matters */
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INCLUDE "text.x"
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INCLUDE "rodata.x"
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INCLUDE "rwtext.x"
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INCLUDE "rwdata.x"
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INCLUDE "rtc_fast.x"
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INCLUDE "rtc_slow.x"
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INCLUDE "external.x"
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/* End of Shared sections */
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_heap_end = ABSOLUTE(ORIGIN(dram_seg))+LENGTH(dram_seg) - 2*STACK_SIZE;
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_stack_start_cpu1 = _heap_end;
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_stack_end_cpu1 = _stack_start_cpu1 + STACK_SIZE;
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_stack_start_cpu0 = _stack_end_cpu1;
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_stack_end_cpu0 = _stack_start_cpu0 + STACK_SIZE;
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EXTERN(DefaultHandler);
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INCLUDE "device.x"
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