mirror of
https://github.com/esp-rs/esp-hal.git
synced 2025-09-28 04:40:52 +00:00

* Remove ChannelCreator types and burst mode * Fix up I2sParallel * Always enable burst transfering descriptors * Configure burst transfer with a non-bool for future chip support * Reuse buffer preparation code * Update LoopBuf as well * Update lcd_cam tests * Rename config, fix changelog
188 lines
5.3 KiB
Rust
188 lines
5.3 KiB
Rust
//! PARL_IO TX test
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//% CHIPS: esp32c6 esp32h2
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#![no_std]
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#![no_main]
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#[cfg(esp32c6)]
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use esp_hal::parl_io::{TxPinConfigWithValidPin, TxSixteenBits};
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use esp_hal::{
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dma::{Channel, Dma, DmaChannel0},
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gpio::{
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interconnect::{InputSignal, OutputSignal},
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NoPin,
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},
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parl_io::{
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BitPackOrder,
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ClkOutPin,
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ParlIoTxOnly,
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SampleEdge,
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TxEightBits,
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TxPinConfigIncludingValidPin,
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},
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pcnt::{
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channel::{CtrlMode, EdgeMode},
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unit::Unit,
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Pcnt,
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},
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peripherals::PARL_IO,
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prelude::*,
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Blocking,
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};
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use hil_test as _;
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struct Context {
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parl_io: PARL_IO,
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dma_channel: Channel<'static, Blocking, DmaChannel0>,
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clock: OutputSignal,
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valid: OutputSignal,
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clock_loopback: InputSignal,
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valid_loopback: InputSignal,
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pcnt_unit: Unit<'static, 0>,
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}
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#[cfg(test)]
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#[embedded_test::tests]
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mod tests {
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use defmt::info;
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use super::*;
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#[init]
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fn init() -> Context {
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let peripherals = esp_hal::init(esp_hal::Config::default());
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let (clock, _) = hil_test::common_test_pins!(peripherals);
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let valid = hil_test::unconnected_pin!(peripherals);
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let (clock_loopback, clock) = clock.split();
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let (valid_loopback, valid) = valid.split();
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let pcnt = Pcnt::new(peripherals.PCNT);
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let pcnt_unit = pcnt.unit0;
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let dma = Dma::new(peripherals.DMA);
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let dma_channel = dma.channel0;
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let parl_io = peripherals.PARL_IO;
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Context {
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parl_io,
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dma_channel,
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clock,
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valid,
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clock_loopback,
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valid_loopback,
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pcnt_unit,
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}
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}
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#[cfg(esp32c6)]
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#[test]
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#[timeout(3)]
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fn test_parl_io_tx_16bit_valid_clock_count(ctx: Context) {
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const BUFFER_SIZE: usize = 64;
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let tx_buffer = [0u16; BUFFER_SIZE];
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let (_, tx_descriptors) = esp_hal::dma_descriptors!(0, 2 * BUFFER_SIZE);
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let pins = TxSixteenBits::new(
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NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin, NoPin,
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NoPin, NoPin, NoPin, ctx.valid,
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);
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let mut pins = TxPinConfigIncludingValidPin::new(pins);
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let mut clock_pin = ClkOutPin::new(ctx.clock);
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let pio =
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ParlIoTxOnly::new(ctx.parl_io, ctx.dma_channel, tx_descriptors, 10.MHz()).unwrap();
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let mut pio = pio
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.tx
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.with_config(
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&mut pins,
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&mut clock_pin,
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0,
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SampleEdge::Invert,
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BitPackOrder::Msb,
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)
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.unwrap(); // TODO: handle error
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// use a PCNT unit to count the negitive clock edges only when valid is high
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let clock_unit = ctx.pcnt_unit;
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clock_unit.channel0.set_edge_signal(ctx.clock_loopback);
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clock_unit.channel0.set_ctrl_signal(ctx.valid_loopback);
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clock_unit
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.channel0
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.set_input_mode(EdgeMode::Increment, EdgeMode::Hold);
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clock_unit
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.channel0
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.set_ctrl_mode(CtrlMode::Disable, CtrlMode::Keep);
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for _ in 0..100 {
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clock_unit.clear();
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let xfer = pio.write_dma(&tx_buffer).unwrap();
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xfer.wait().unwrap();
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info!("clock count: {}", clock_unit.value());
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assert_eq!(clock_unit.value(), BUFFER_SIZE as _);
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}
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}
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#[test]
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#[timeout(3)]
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fn test_parl_io_tx_8bit_valid_clock_count(ctx: Context) {
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const BUFFER_SIZE: usize = 64;
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let tx_buffer = [0u8; BUFFER_SIZE];
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let (_, tx_descriptors) = esp_hal::dma_descriptors!(0, 2 * BUFFER_SIZE);
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let pins = TxEightBits::new(
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NoPin,
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NoPin,
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NoPin,
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NoPin,
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NoPin,
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NoPin,
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NoPin,
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#[cfg(esp32h2)]
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ctx.valid,
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#[cfg(esp32c6)]
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NoPin,
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);
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#[cfg(esp32h2)]
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let mut pins = TxPinConfigIncludingValidPin::new(pins);
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#[cfg(esp32c6)]
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let mut pins = TxPinConfigWithValidPin::new(pins, ctx.valid);
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let mut clock_pin = ClkOutPin::new(ctx.clock);
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let pio =
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ParlIoTxOnly::new(ctx.parl_io, ctx.dma_channel, tx_descriptors, 10.MHz()).unwrap();
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let mut pio = pio
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.tx
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.with_config(
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&mut pins,
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&mut clock_pin,
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0,
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SampleEdge::Invert,
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BitPackOrder::Msb,
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)
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.unwrap(); // TODO: handle error
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// use a PCNT unit to count the negitive clock edges only when valid is high
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let clock_unit = ctx.pcnt_unit;
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clock_unit.channel0.set_edge_signal(ctx.clock_loopback);
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clock_unit.channel0.set_ctrl_signal(ctx.valid_loopback);
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clock_unit
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.channel0
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.set_input_mode(EdgeMode::Increment, EdgeMode::Hold);
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clock_unit
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.channel0
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.set_ctrl_mode(CtrlMode::Disable, CtrlMode::Keep);
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for _ in 0..100 {
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clock_unit.clear();
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let xfer = pio.write_dma(&tx_buffer).unwrap();
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xfer.wait().unwrap();
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info!("clock count: {}", clock_unit.value());
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assert_eq!(clock_unit.value(), BUFFER_SIZE as _);
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}
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}
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}
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