9bf70ff792
* Combine `esp-ulp-riscv-hal` and `esp32c6-lp-hal` into a single package * Update LP core examples * Update CI workflow * Fix `LP_UART` example
esp-lp-hal
no_std HAL for the low-power RISC-V coprocessors found on the ESP32-C6, ESP32-S2, and ESP32-S3 from Espressif.
Implements a number of the traits defined in embedded-hal.
These devices uses the RISC-V ISA, which is officially supported by the Rust compiler via the riscv32imc-unknown-none-elf and riscv32imac-unknown-none-elf targets.
Please refer to the documentation for more information.
Documentation
Supported Devices
| Chip | Datasheet | Technical Reference Manual | Target |
|---|---|---|---|
| ESP32-C6 | ESP32-C6 | ESP32-C6 | riscv32imac-unknown-none-elf |
| ESP32-S2 | ESP32-S2 | ESP32-S2 | riscv32imc-unknown-none-elf |
| ESP32-S3 | ESP32-S3 | ESP32-S3 | riscv32imc-unknown-none-elf |
Resources
- The Rust Programming Language
- The Embedded Rust Book
- The Rust on ESP Book
- Datasheets:
- Technical Reference Manuals:
Getting Started
Installing the Rust Compiler Targets
The compilation targets for these devices are officially supported by the mainline Rust compiler and can be installed using rustup:
rustup target add riscv32imc-unknown-none-elf
rustup target add riscv32imac-unknown-none-elf
License
Licensed under either of:
- Apache License, Version 2.0 (LICENSE-APACHE or http://www.apache.org/licenses/LICENSE-2.0)
- MIT license (LICENSE-MIT or http://opensource.org/licenses/MIT)
at your option.
Contribution
Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.