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* Update `esp32-hal` examples * Update `esp32c2-hal` examples * Update `esp32c3-hal` examples * Update `esp32c6-hal` examples * Update `esp32h2-hal` examples * Update `esp32s2-hal` examples * Update `esp32s3-hal` examples * Fix the `ram.rs` examples
55 lines
1.7 KiB
Rust
55 lines
1.7 KiB
Rust
//! This shows a very basic example of running code on the ULP RISCV core.
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//!
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//! Code on ULP core just increments a counter. The current value is printed by
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//! the HP core.
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#![no_std]
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#![no_main]
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use esp32s2_hal::{clock::ClockControl, peripherals::Peripherals, prelude::*};
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use esp_backtrace as _;
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use esp_println::println;
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// 50000000 <_start>:
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// 50000000: 00000517 auipc a0,0x0
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// 50000004: 01050513 addi a0,a0,16 # 50000010 <data>
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// 50000008: 4581 li a1,0
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//
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// 5000000a <_loop>:
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// 5000000a: 0585 addi a1,a1,1
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// 5000000c: c10c sw a1,0(a0)
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// 5000000e: bff5 j 5000000a <_loop>
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//
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// 50000010 <data>:
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// 50000010: 0000 0000
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const CODE: &[u8] = &[
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0x17, 0x05, 0x00, 0x00, 0x13, 0x05, 0x05, 0x01, 0x81, 0x45, 0x85, 0x05, 0x0c, 0xc1, 0xf5, 0xbf,
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0x00, 0x00, 0x00, 0x00,
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];
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take();
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let system = peripherals.SYSTEM.split();
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let _clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let mut ulp_core = esp32s2_hal::ulp_core::UlpCore::new(peripherals.ULP_RISCV_CORE);
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// copy code to RTC ram
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let lp_ram = 0x5000_0000 as *mut u8;
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unsafe {
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core::ptr::copy_nonoverlapping(CODE as *const _ as *const u8, lp_ram, CODE.len());
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}
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println!("copied code (len {})", CODE.len());
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// start ULP core
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ulp_core.run(esp32s2_hal::ulp_core::UlpCoreWakeupSource::HpCpu);
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println!("ulpcore run");
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let data = (0x5000_0010 - 0) as *mut u32;
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loop {
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println!("Current {}", unsafe { data.read_volatile() });
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}
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}
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