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* Update `esp32-hal` examples * Update `esp32c2-hal` examples * Update `esp32c3-hal` examples * Update `esp32c6-hal` examples * Update `esp32h2-hal` examples * Update `esp32s2-hal` examples * Update `esp32s3-hal` examples * Fix the `ram.rs` examples
66 lines
1.5 KiB
Rust
66 lines
1.5 KiB
Rust
//! This shows how to use the TIMG peripheral interrupts.
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//! There is TIMG0 which contains a general purpose timer and a watchdog timer.
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#![no_std]
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#![no_main]
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use core::cell::RefCell;
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use critical_section::Mutex;
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use esp32c2_hal::{
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clock::ClockControl,
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interrupt,
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peripherals::{self, Peripherals, TIMG0},
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prelude::*,
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riscv,
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timer::{Timer, Timer0, TimerGroup},
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};
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use esp_backtrace as _;
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static TIMER0: Mutex<RefCell<Option<Timer<Timer0<TIMG0>>>>> = Mutex::new(RefCell::new(None));
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take();
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let mut system = peripherals.SYSTEM.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let timer_group0 = TimerGroup::new(
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peripherals.TIMG0,
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&clocks,
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&mut system.peripheral_clock_control,
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);
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let mut timer0 = timer_group0.timer0;
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interrupt::enable(
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peripherals::Interrupt::TG0_T0_LEVEL,
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interrupt::Priority::Priority1,
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)
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.unwrap();
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timer0.start(500u64.millis());
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timer0.listen();
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critical_section::with(|cs| {
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TIMER0.borrow_ref_mut(cs).replace(timer0);
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});
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unsafe {
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riscv::interrupt::enable();
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}
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loop {}
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}
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#[interrupt]
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fn TG0_T0_LEVEL() {
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critical_section::with(|cs| {
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esp_println::println!("Interrupt 1");
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let mut timer0 = TIMER0.borrow_ref_mut(cs);
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let timer0 = timer0.as_mut().unwrap();
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timer0.clear_interrupt();
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timer0.start(500u64.millis());
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});
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}
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