esp-hal/esp32c2-hal/examples/timer_interrupt.rs
Jesse Braham d12a3dbac5
Update all examples to remove unnecessary disabling of watchdogs (#768)
* Update `esp32-hal` examples

* Update `esp32c2-hal` examples

* Update `esp32c3-hal` examples

* Update `esp32c6-hal` examples

* Update `esp32h2-hal` examples

* Update `esp32s2-hal` examples

* Update `esp32s3-hal` examples

* Fix the `ram.rs` examples
2023-08-31 07:17:12 -07:00

66 lines
1.5 KiB
Rust

//! This shows how to use the TIMG peripheral interrupts.
//! There is TIMG0 which contains a general purpose timer and a watchdog timer.
#![no_std]
#![no_main]
use core::cell::RefCell;
use critical_section::Mutex;
use esp32c2_hal::{
clock::ClockControl,
interrupt,
peripherals::{self, Peripherals, TIMG0},
prelude::*,
riscv,
timer::{Timer, Timer0, TimerGroup},
};
use esp_backtrace as _;
static TIMER0: Mutex<RefCell<Option<Timer<Timer0<TIMG0>>>>> = Mutex::new(RefCell::new(None));
#[entry]
fn main() -> ! {
let peripherals = Peripherals::take();
let mut system = peripherals.SYSTEM.split();
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let timer_group0 = TimerGroup::new(
peripherals.TIMG0,
&clocks,
&mut system.peripheral_clock_control,
);
let mut timer0 = timer_group0.timer0;
interrupt::enable(
peripherals::Interrupt::TG0_T0_LEVEL,
interrupt::Priority::Priority1,
)
.unwrap();
timer0.start(500u64.millis());
timer0.listen();
critical_section::with(|cs| {
TIMER0.borrow_ref_mut(cs).replace(timer0);
});
unsafe {
riscv::interrupt::enable();
}
loop {}
}
#[interrupt]
fn TG0_T0_LEVEL() {
critical_section::with(|cs| {
esp_println::println!("Interrupt 1");
let mut timer0 = TIMER0.borrow_ref_mut(cs);
let timer0 = timer0.as_mut().unwrap();
timer0.clear_interrupt();
timer0.start(500u64.millis());
});
}