mirror of
https://github.com/esp-rs/esp-hal.git
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db409ffe7b
* Unify the system peripheral Whilst the PCR, SYSTEM and DPORT peripherals are different, we currently use them all in the same way. This PR unifies the peripheral name in the hal to `SYSTEM`. The idea is that they all do the same sort of thing, so we can collect them under the same name, and later down the line we can being to expose differences under an extended API. The benifits to this are imo quite big, the examples now are all identical, which makes things easier for esp-wifi, and paves a path towards the multichip hal. Why not do this in the PAC? Imo the pac should be as close to the hardware as possible, and the HAL is where we should abstractions such as this. * changelog
85 lines
2.2 KiB
Rust
85 lines
2.2 KiB
Rust
#![no_main]
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#![no_std]
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#![feature(naked_functions)]
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use core::{arch::asm, cell::RefCell};
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use critical_section::Mutex;
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use esp32h2_hal::{
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clock::ClockControl,
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interrupt::{
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CpuInterrupt,
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{self},
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},
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peripherals::{self, Peripherals},
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prelude::*,
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system::{SoftwareInterrupt, SoftwareInterruptControl},
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};
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use esp_backtrace as _;
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static SWINT: Mutex<RefCell<Option<SoftwareInterruptControl>>> = Mutex::new(RefCell::new(None));
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take();
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let system = peripherals.SYSTEM.split();
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let clockctrl = system.clock_control;
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let sw_int = system.software_interrupt_control;
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let _clocks = ClockControl::boot_defaults(clockctrl).freeze();
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critical_section::with(|cs| SWINT.borrow_ref_mut(cs).replace(sw_int));
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unsafe {
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interrupt::enable(
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peripherals::Interrupt::FROM_CPU_INTR0,
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interrupt::Priority::Priority3,
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CpuInterrupt::Interrupt1,
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)
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.unwrap();
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asm!(
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"
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csrrwi x0, 0x7e0, 1 #what to count, for cycles write 1 for instructions write 2
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csrrwi x0, 0x7e1, 0 #disable counter
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csrrwi x0, 0x7e2, 0 #reset counter
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"
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);
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}
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esp_println::println!("MPC:{}", unsafe { fetch_performance_timer() });
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// interrupt is raised from assembly for max timer granularity.
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unsafe {
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asm!(
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"
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li t0, 0x600C5090 #FROM_CPU_INTR0 address
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li t1, 1 #Flip flag
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csrrwi x0, 0x7e1, 1 #enable timer
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sw t1, 0(t0) #trigger FROM_CPU_INTR0
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"
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)
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}
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esp_println::println!("Returned");
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loop {}
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}
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#[no_mangle]
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fn cpu_int_1_handler() {
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unsafe { asm!("csrrwi x0, 0x7e1, 0 #disable timer") }
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critical_section::with(|cs| {
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SWINT
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.borrow_ref_mut(cs)
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.as_mut()
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.unwrap()
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.reset(SoftwareInterrupt::SoftwareInterrupt0);
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});
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esp_println::println!("Performance counter:{}", unsafe {
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fetch_performance_timer()
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});
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}
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#[naked]
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unsafe extern "C" fn fetch_performance_timer() -> i32 {
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asm!(
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"
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csrr a0, 0x7e2
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jr ra
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",
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options(noreturn)
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);
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}
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