mirror of
https://github.com/esp-rs/esp-hal.git
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91ea205446
* esp32: Fix typo in Frequency word in some identifiers Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com> * esp32c3: Add support for PLL clock configuration Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com> * clock: Move definition of Clock types to common level Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com> * esp32c3: Add support for RTC Clock configuration Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com> * esp32c3: Add example for the RTC Watchdog Timer driver Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
106 lines
2.9 KiB
Rust
106 lines
2.9 KiB
Rust
//! This shows some of the interrupts that can be generated by UART/Serial.
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//! Use a proper serial terminal to connect to the board (espmonitor and
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//! espflash won't work)
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#![no_std]
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#![no_main]
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use core::{cell::RefCell, fmt::Write};
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use bare_metal::Mutex;
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use esp32c3_hal::{
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clock::ClockControl,
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interrupt,
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pac::{self, Peripherals, UART0},
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prelude::*,
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serial::config::AtCmdConfig,
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timer::TimerGroup,
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Cpu,
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Rtc,
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Serial,
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};
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use nb::block;
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use panic_halt as _;
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use riscv_rt::entry;
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static mut SERIAL: Mutex<RefCell<Option<Serial<UART0>>>> = Mutex::new(RefCell::new(None));
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take().unwrap();
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let system = peripherals.SYSTEM.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let mut rtc = Rtc::new(peripherals.RTC_CNTL);
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let mut serial0 = Serial::new(peripherals.UART0);
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let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks);
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let mut timer0 = timer_group0.timer0;
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let mut wdt0 = timer_group0.wdt;
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let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks);
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let mut wdt1 = timer_group1.wdt;
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// Disable watchdog timers
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rtc.swd.disable();
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rtc.rwdt.disable();
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wdt0.disable();
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wdt1.disable();
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serial0.set_at_cmd(AtCmdConfig::new(None, None, None, b'#', None));
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serial0.set_rx_fifo_full_threshold(30);
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serial0.listen_at_cmd();
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serial0.listen_rx_fifo_full();
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timer0.start(1u64.secs());
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riscv::interrupt::free(|_cs| unsafe {
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SERIAL.get_mut().replace(Some(serial0));
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});
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interrupt::enable(pac::Interrupt::UART0, interrupt::Priority::Priority1).unwrap();
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interrupt::set_kind(
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Cpu::ProCpu,
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interrupt::CpuInterrupt::Interrupt1, // Interrupt 1 handles priority one interrupts
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interrupt::InterruptKind::Edge,
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);
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unsafe {
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riscv::interrupt::enable();
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}
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loop {
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riscv::interrupt::free(|cs| unsafe {
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let mut serial = SERIAL.borrow(*cs).borrow_mut();
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let serial = serial.as_mut().unwrap();
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writeln!(serial, "Hello World! Send a single `#` character or send at least 30 characters and see the interrupts trigger.").ok();
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});
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block!(timer0.wait()).unwrap();
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}
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}
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#[interrupt]
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fn UART0() {
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riscv::interrupt::free(|cs| unsafe {
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let mut serial = SERIAL.borrow(*cs).borrow_mut();
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let serial = serial.as_mut().unwrap();
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let mut cnt = 0;
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while let nb::Result::Ok(_c) = serial.read() {
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cnt += 1;
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}
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writeln!(serial, "Read {} bytes", cnt,).ok();
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writeln!(
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serial,
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"Interrupt AT-CMD: {} RX-FIFO-FULL: {}",
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serial.at_cmd_interrupt_set(),
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serial.rx_fifo_full_interrupt_set(),
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)
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.ok();
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serial.reset_at_cmd_interrupt();
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serial.reset_rx_fifo_full_interrupt();
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});
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}
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