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https://github.com/esp-rs/esp-hal.git
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db409ffe7b
* Unify the system peripheral Whilst the PCR, SYSTEM and DPORT peripherals are different, we currently use them all in the same way. This PR unifies the peripheral name in the hal to `SYSTEM`. The idea is that they all do the same sort of thing, so we can collect them under the same name, and later down the line we can being to expose differences under an extended API. The benifits to this are imo quite big, the examples now are all identical, which makes things easier for esp-wifi, and paves a path towards the multichip hal. Why not do this in the PAC? Imo the pac should be as close to the hardware as possible, and the HAL is where we should abstractions such as this. * changelog
123 lines
3.6 KiB
Rust
123 lines
3.6 KiB
Rust
//! This shows how to use the TIMG peripheral interrupts.
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//! There is TIMG0 and TIMG1 each of them containing two general purpose timers
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//! and a watchdog timer.
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#![no_std]
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#![no_main]
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use core::cell::RefCell;
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use critical_section::Mutex;
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use esp32_hal::{
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clock::ClockControl,
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interrupt,
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interrupt::Priority,
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peripherals::{self, Peripherals, TIMG0, TIMG1},
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prelude::*,
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timer::{Timer, Timer0, Timer1, TimerGroup},
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};
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use esp_backtrace as _;
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static TIMER00: Mutex<RefCell<Option<Timer<Timer0<TIMG0>>>>> = Mutex::new(RefCell::new(None));
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static TIMER01: Mutex<RefCell<Option<Timer<Timer1<TIMG0>>>>> = Mutex::new(RefCell::new(None));
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static TIMER10: Mutex<RefCell<Option<Timer<Timer0<TIMG1>>>>> = Mutex::new(RefCell::new(None));
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static TIMER11: Mutex<RefCell<Option<Timer<Timer1<TIMG1>>>>> = Mutex::new(RefCell::new(None));
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take();
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let system = peripherals.SYSTEM.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks);
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let mut timer00 = timer_group0.timer0;
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let mut timer01 = timer_group0.timer1;
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let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks);
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let mut timer10 = timer_group1.timer0;
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let mut timer11 = timer_group1.timer1;
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interrupt::enable(peripherals::Interrupt::TG0_T0_LEVEL, Priority::Priority2).unwrap();
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interrupt::enable(peripherals::Interrupt::TG0_T1_LEVEL, Priority::Priority2).unwrap();
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interrupt::enable(peripherals::Interrupt::TG1_T0_LEVEL, Priority::Priority3).unwrap();
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interrupt::enable(peripherals::Interrupt::TG1_T1_LEVEL, Priority::Priority3).unwrap();
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timer00.start(500u64.millis());
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timer00.listen();
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timer01.start(2500u64.millis());
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timer01.listen();
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timer10.start(1u64.secs());
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timer10.listen();
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timer11.start(3u64.secs());
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timer11.listen();
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critical_section::with(|cs| {
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TIMER00.borrow_ref_mut(cs).replace(timer00);
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TIMER01.borrow_ref_mut(cs).replace(timer01);
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TIMER10.borrow_ref_mut(cs).replace(timer10);
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TIMER11.borrow_ref_mut(cs).replace(timer11);
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});
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loop {}
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}
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#[interrupt]
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fn TG0_T0_LEVEL() {
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critical_section::with(|cs| {
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let mut timer = TIMER00.borrow_ref_mut(cs);
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let timer = timer.as_mut().unwrap();
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if timer.is_interrupt_set() {
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timer.clear_interrupt();
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timer.start(500u64.millis());
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esp_println::println!("Interrupt Level 2 - Timer0");
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}
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});
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}
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#[interrupt]
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fn TG0_T1_LEVEL() {
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critical_section::with(|cs| {
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let mut timer = TIMER01.borrow_ref_mut(cs);
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let timer = timer.as_mut().unwrap();
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if timer.is_interrupt_set() {
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timer.clear_interrupt();
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timer.start(2500u64.millis());
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esp_println::println!("Interrupt Level 2 - Timer1");
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}
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});
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}
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#[interrupt]
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fn TG1_T0_LEVEL() {
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critical_section::with(|cs| {
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let mut timer = TIMER10.borrow_ref_mut(cs);
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let timer = timer.as_mut().unwrap();
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if timer.is_interrupt_set() {
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timer.clear_interrupt();
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timer.start(1u64.secs());
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esp_println::println!("Interrupt Level 3 - Timer0");
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}
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});
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}
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#[interrupt]
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fn TG1_T1_LEVEL() {
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critical_section::with(|cs| {
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let mut timer = TIMER10.borrow_ref_mut(cs);
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let timer = timer.as_mut().unwrap();
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if timer.is_interrupt_set() {
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timer.clear_interrupt();
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timer.start(3u64.secs());
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esp_println::println!("Interrupt Level 3 - Timer1");
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}
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});
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}
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