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* Create the `esp32c6-hal` package * Teach `esp-hal-common` about the ESP32-C6 * Get a number of peripheral drivers building for the ESP32-C6 bckup initial clocks_ii * Create the `esp32c6-hal` package C6: update * Simplify and fix the linker script update * C6: add I2S * Create the `esp32c6-hal` package * Teach `esp-hal-common` about the ESP32-C6 * Get a number of peripheral drivers building for the ESP32-C6 bckup initial clocks_ii * Create the `esp32c6-hal` package * C6: update * Simplify and fix the linker script * update * C6: add I2S * update * C6 Interrupts * C6: Update build.rs, linker scripts and initial examples * C6: RMT * Fix interrupt handling * Fix `ClockControl::configure` * C6: revert to I2S0 instead of just I2S * C6: rebase and update * RTC not buildable * Implement RWDT and SWD disable * C6: working LEDC * C6: working RMT * C6: add aes * C6: add mcpwm * C6: add rtc_cntln - not finished * C6: update and formatting * C6: add pcnt * C6: add examples and format * Remove inline assembly, fix interrupts and linker scripts * Remove unused features, update cargo config for atomic emu, misc cleanup * Get ADC building and example "working" (as much as it ever does) * Remove a bunch of unused constants which were copied from ESP-IDF * The `mcpwm` example now works correctly * Get `TWAI` peripheral driver building for C6 * Clean up the `rtc_cntl` module and get all the other HALs building again * Add the C6 to our CI workflow * Fix various things that have been missed when rebasing Still missing a few examples (`clock_monitor`, `embassy_spi`, `ram`) * C6: Small updates in wdt (#1) * C6: Update WDT * C6: Update examples with WDT update * Update `esp-println` dependency to fix build errors * Fix formatting issues causing pre-commit hook to fail * Get some more examples working * Working `ram` example * Sync with changes in `main` after rebasing * Working `embassy_spi` example * Use a git dependency for the PAC until we publish a release * Fix I2S for ESP32-C6 * Fix esp32c6 direct boot (#4) * Add direct boot support for C6 * Fix direct boot for c6 - Actually copy into rtc ram - remove dummy section that is no longer needed (was just a waste of flash space) - Move RTC stuff before the no load sections * Update RWDT and refactor RTC (#3) * C6: Update RWDT and add example, refactor RTC and add not-really-good example * Update based on review comments, resolve bunch of warnings and run cargo fmt * Update C6 esp-pacs rev commit * Fix clocks_ll/esp32c6.rs * Fix riscv interrupts * Remove clock_monitor example for now * RAM example works in direct-boot mode * Add a TODO for &mut TIMG0 and cargo fmt * Fix linker script after a bad rebase * Update CI and Cargo.toml embassy required features * use riscv32imac-unknown-none-elf target for C6 in CI * change default target to riscv32imac-unknown-none-elf * add riscv32imac-unknown-none-elf target to MSRV job * another cleanup --------- Co-authored-by: bjoernQ <bjoern.quentin@mobile-j.de> Co-authored-by: Jesse Braham <jesse@beta7.io> * Make required changes to include new `RADIO` peripheral * Use published versions of PAC and `esp-println` * Use the correct target extensions (`imac`) * Fix the super watchdog timer, plus a few more examples * Fix UART clock configuration * Make sure to sync UART registers when configuring AT cmd detection * Disable APM in direct-boot mode * Address a number of review comments * Fix `SPI` clocks and `rtc_watchdog` example (#6) * fix SPI clocks * run cargo fmt * Add comment about used default clk src * Fix rtc_watchdog example in BL mode * run cargo fmt * Update rtc_watchdog example that it works in DB mode * README and example fixes/cleanup * Add I2C peripheral enable and reset * Fix `ApbSarAdc` configuration in `system.rs` --------- Co-authored-by: bjoernQ <bjoern.quentin@mobile-j.de> Co-authored-by: Juraj Sadel <juraj.sadel@espressif.com> Co-authored-by: Juraj Sadel <jurajsadel@gmail.com> Co-authored-by: Scott Mabin <scott@mabez.dev>
100 lines
2.7 KiB
Rust
100 lines
2.7 KiB
Rust
//! This shows how to use RTC memory.
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//! RTC memory is retained during resets and during most sleep modes.
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//! Initialized memory is always re-initialized on startup.
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//! Uninitialzed memory isn't initialized on startup and can be used to keep
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//! data during resets. Zeroed memory is initialized to zero on startup.
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//! We can also run code from RTC memory.
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#![no_std]
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#![no_main]
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use esp32c6_hal::{
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clock::ClockControl,
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macros::ram,
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peripherals::Peripherals,
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prelude::*,
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timer::TimerGroup,
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};
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use esp_backtrace as _;
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use esp_println::println;
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use nb::block;
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#[ram(rtc_fast)]
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static mut SOME_INITED_DATA: [u8; 2] = [0xaa, 0xbb];
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#[ram(rtc_fast, uninitialized)]
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static mut SOME_UNINITED_DATA: [u8; 2] = [0; 2];
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#[ram(rtc_fast, zeroed)]
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static mut SOME_ZEROED_DATA: [u8; 8] = [0; 8];
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take();
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let system = peripherals.PCR.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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// Disable the watchdog timers. For the ESP32-C6, this includes the Super WDT,
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// and the TIMG WDTs.
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let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks);
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let mut timer0 = timer_group0.timer0;
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let mut wdt0 = timer_group0.wdt;
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let timer_group1 = TimerGroup::new(peripherals.TIMG1, &clocks);
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let mut wdt1 = timer_group1.wdt;
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// Disable MWDT flash boot protection
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wdt0.disable();
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wdt1.disable();
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// The RWDT flash boot protection remains enabled and it being triggered is part
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// of the example
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timer0.start(1u64.secs());
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println!("RAM function located at {:p}", function_in_ram as *const ());
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unsafe {
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println!("SOME_INITED_DATA {:x?}", SOME_INITED_DATA);
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println!("SOME_UNINITED_DATA {:x?}", SOME_UNINITED_DATA);
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println!("SOME_ZEROED_DATA {:x?}", SOME_ZEROED_DATA);
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SOME_INITED_DATA[0] = 0xff;
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SOME_ZEROED_DATA[0] = 0xff;
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println!("SOME_INITED_DATA {:x?}", SOME_INITED_DATA);
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println!("SOME_UNINITED_DATA {:x?}", SOME_UNINITED_DATA);
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println!("SOME_ZEROED_DATA {:x?}", SOME_ZEROED_DATA);
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if SOME_UNINITED_DATA[0] != 0 {
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SOME_UNINITED_DATA[0] = 0;
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SOME_UNINITED_DATA[1] = 0;
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}
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if SOME_UNINITED_DATA[1] == 0xff {
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SOME_UNINITED_DATA[1] = 0;
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}
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println!("Counter {}", SOME_UNINITED_DATA[1]);
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SOME_UNINITED_DATA[1] += 1;
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}
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println!(
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"RTC_FAST function located at {:p}",
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function_in_rtc_ram as *const ()
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);
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println!("Result {}", function_in_rtc_ram());
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loop {
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function_in_ram();
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block!(timer0.wait()).unwrap();
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}
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}
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#[ram]
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fn function_in_ram() {
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println!("Hello world!");
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}
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#[ram(rtc_fast)]
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fn function_in_rtc_ram() -> u32 {
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42
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}
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