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dfd66be8ab
* use `riscv::interrupt::nested` for nesting * Only save/restore caller saved registers in trap-frame (risc-v) * Replace RISC-V scheduler * Cleanup * Clippy * CHANGELOG.md * Make sure to reset the runlevel to current, not prio-1 * Clippy * Fix it for real * Address review comments * Address review comments * More docs, optimize away one instruction * Address review comments * Address review comments * Use a bool for the nested flag again * Fix * Clippy
esp-riscv-rt
Minimal runtime / startup for RISC-V devices from Espressif.
Much of the code in this package originated in the rust-embedded/riscv repository.
Documentation
Minimum Supported Rust Version (MSRV)
This crate is guaranteed to compile when using the latest stable Rust version at the time of the crate's release. It might compile with older versions, but that may change in any new release, including patches.
License
Licensed under either of:
- Apache License, Version 2.0 (LICENSE-APACHE or http://www.apache.org/licenses/LICENSE-2.0)
- MIT license (LICENSE-MIT or http://opensource.org/licenses/MIT)
at your option.
Contribution
Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.