esp-hal/hil-test/tests/spi_half_duplex_write.rs
Dániel Buga ec130877b7
Disable RTT polling in HIL tests by default (#1960)
* Disable defmt-rtt by default

* Update i2s test based on changes done to async

* fmt

* Update readme

* Update more tests
2024-08-19 13:47:22 +00:00

114 lines
3.0 KiB
Rust

//! SPI Half Duplex Write Test
//!
//! Following pins are used:
//! SCLK GPIO0
//! MOSI GPIO2
//!
//! PCNT GPIO3
//!
//! Connect MOSI (GPIO2) and PCNT (GPIO3) pins.
//% CHIPS: esp32 esp32c6 esp32h2 esp32s3
#![no_std]
#![no_main]
use hil_test as _;
#[cfg(test)]
#[embedded_test::tests]
mod tests {
use esp_hal::{
clock::ClockControl,
dma::{Dma, DmaPriority},
dma_buffers,
gpio::{Io, Pull},
pcnt::{
channel::{EdgeMode, PcntInputConfig, PcntSource},
Pcnt,
},
peripherals::Peripherals,
prelude::_fugit_RateExtU32,
spi::{
master::{prelude::*, Address, Command, Spi},
SpiDataMode,
SpiMode,
},
system::SystemControl,
};
#[init]
fn init() {}
#[test]
#[timeout(3)]
fn test_spi_writes_are_correctly_by_pcnt() {
const DMA_BUFFER_SIZE: usize = 4;
let peripherals = Peripherals::take();
let system = SystemControl::new(peripherals.SYSTEM);
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
let pcnt = Pcnt::new(peripherals.PCNT);
let dma = Dma::new(peripherals.DMA);
let sclk = io.pins.gpio0;
let mosi = io.pins.gpio2;
let mosi_mirror = io.pins.gpio3;
#[cfg(any(feature = "esp32", feature = "esp32s2"))]
let dma_channel = dma.spi2channel;
#[cfg(not(any(feature = "esp32", feature = "esp32s2")))]
let dma_channel = dma.channel0;
let (tx_buffer, tx_descriptors, _, rx_descriptors) = dma_buffers!(DMA_BUFFER_SIZE, 0);
let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100.kHz(), SpiMode::Mode0, &clocks)
.with_sck(sclk)
.with_mosi(mosi)
.with_dma(
dma_channel.configure(false, DmaPriority::Priority0),
tx_descriptors,
rx_descriptors,
);
let unit = pcnt.unit0;
unit.channel0.set_edge_signal(PcntSource::from_pin(
mosi_mirror,
PcntInputConfig { pull: Pull::Down },
));
unit.channel0
.set_input_mode(EdgeMode::Hold, EdgeMode::Increment);
// Fill the buffer where each byte has 3 pos edges.
tx_buffer.fill(0b0110_1010);
let transfer = spi
.write(
SpiDataMode::Single,
Command::None,
Address::None,
0,
&tx_buffer,
)
.unwrap();
transfer.wait().unwrap();
assert_eq!(unit.get_value(), (3 * DMA_BUFFER_SIZE) as _);
let transfer = spi
.write(
SpiDataMode::Single,
Command::None,
Address::None,
0,
&tx_buffer,
)
.unwrap();
transfer.wait().unwrap();
assert_eq!(unit.get_value(), (6 * DMA_BUFFER_SIZE) as _);
}
}