mirror of
https://github.com/esp-rs/esp-idf-hal.git
synced 2025-09-26 20:00:35 +00:00
- Added GPIO pins 21-27 to esp32h2 (#501)
- fixed GPIO handler array size for esp32c2
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.gitignore
vendored
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.gitignore
vendored
@ -1,4 +1,5 @@
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/.vscode
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/.idea
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/.espressif
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/.embuild
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/target
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40
src/gpio.rs
40
src/gpio.rs
@ -2080,10 +2080,10 @@ mod chip {
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#[allow(clippy::type_complexity)]
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#[cfg(feature = "alloc")]
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pub(crate) static mut PIN_ISR_HANDLER: [Option<Box<dyn FnMut() + Send + 'static>>; 20] =
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[PIN_ISR_INIT; 20];
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pub(crate) static mut PIN_ISR_HANDLER: [Option<Box<dyn FnMut() + Send + 'static>>; 21] =
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[PIN_ISR_INIT; 21];
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pub(crate) static PIN_NOTIF: [HalIsrNotification; 20] = [PIN_NOTIF_INIT; 20];
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pub(crate) static PIN_NOTIF: [HalIsrNotification; 21] = [PIN_NOTIF_INIT; 21];
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// NOTE: Gpio12 - Gpio17 are used by SPI0/SPI1 for external PSRAM/SPI Flash and
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// are not recommended for other uses
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@ -2184,13 +2184,16 @@ mod chip {
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#[allow(clippy::type_complexity)]
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#[cfg(feature = "alloc")]
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pub(crate) static mut PIN_ISR_HANDLER: [Option<Box<dyn FnMut() + Send + 'static>>; 20] =
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[PIN_ISR_INIT; 20];
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pub(crate) static mut PIN_ISR_HANDLER: [Option<Box<dyn FnMut() + Send + 'static>>; 28] =
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[PIN_ISR_INIT; 28];
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pub(crate) static PIN_NOTIF: [HalIsrNotification; 20] = [PIN_NOTIF_INIT; 20];
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pub(crate) static PIN_NOTIF: [HalIsrNotification; 28] = [PIN_NOTIF_INIT; 28];
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// NOTE: Gpio12 - Gpio17 are used by SPI0/SPI1 for external PSRAM/SPI Flash and
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// are not recommended for other uses
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// NOTE: Following pins have special meaning and are not recommended for other uses. But one may use them with care.
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// - Gpio12 - Gpio17 are used by SPI0/SPI1 for external PSRAM/SPI Flash
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// - Gpio21 seems not to be exposed physically
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// - Gpio23 + Gpio24 are used by serial debug interface
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// - Gpio26 + Gpio27 are used by USB debug interface
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pin!(Gpio0:0, IO, NORTC:0, NOADC:0, NODAC:0, NOTOUCH:0);
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pin!(Gpio1:1, IO, NORTC:0, ADC1:0, NODAC:0, NOTOUCH:0);
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pin!(Gpio2:2, IO, NORTC:0, ADC1:1, NODAC:0, NOTOUCH:0);
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@ -2212,6 +2215,13 @@ mod chip {
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pin!(Gpio18:18, IO, NORTC:0, NOADC:0, NODAC:0, NOTOUCH:0);
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pin!(Gpio19:19, IO, NORTC:0, NOADC:0, NODAC:0, NOTOUCH:0);
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pin!(Gpio20:20, IO, NORTC:0, NOADC:0, NODAC:0, NOTOUCH:0);
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pin!(Gpio21:21, IO, NORTC:0, NOADC:0, NODAC:0, NOTOUCH:0);
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pin!(Gpio22:22, IO, NORTC:0, NOADC:0, NODAC:0, NOTOUCH:0);
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pin!(Gpio23:23, IO, NORTC:0, NOADC:0, NODAC:0, NOTOUCH:0);
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pin!(Gpio24:24, IO, NORTC:0, NOADC:0, NODAC:0, NOTOUCH:0);
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pin!(Gpio25:25, IO, NORTC:0, NOADC:0, NODAC:0, NOTOUCH:0);
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pin!(Gpio26:26, IO, NORTC:0, NOADC:0, NODAC:0, NOTOUCH:0);
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pin!(Gpio27:27, IO, NORTC:0, NOADC:0, NODAC:0, NOTOUCH:0);
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pub struct Pins {
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pub gpio0: Gpio0,
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@ -2235,6 +2245,13 @@ mod chip {
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pub gpio18: Gpio18,
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pub gpio19: Gpio19,
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pub gpio20: Gpio20,
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pub gpio21: Gpio21,
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pub gpio22: Gpio22,
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pub gpio23: Gpio23,
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pub gpio24: Gpio24,
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pub gpio25: Gpio25,
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pub gpio26: Gpio26,
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pub gpio27: Gpio27,
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}
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impl Pins {
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@ -2265,6 +2282,13 @@ mod chip {
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gpio18: Gpio18::new(),
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gpio19: Gpio19::new(),
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gpio20: Gpio20::new(),
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gpio21: Gpio21::new(),
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gpio22: Gpio22::new(),
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gpio23: Gpio23::new(),
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gpio24: Gpio24::new(),
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gpio25: Gpio25::new(),
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gpio26: Gpio26::new(),
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gpio27: Gpio27::new(),
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}
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}
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}
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