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13ba61fb0b
* initial draft * working alternative without using i32 id's * EspSpiDevice + SpiDriverMaster / no global statics * start splitting implementation in spi & spi_pool * impl SpiDevice for EspSpiDevice * spi2_pool draft (spi with software based cs) * pre master fetch up * Driver accepts Optional DMA channel + fetch master * replaced: std with core, mutex with hal's cs * replaced HashMap with Array * merged spi2 into spi * clean up * replace std with core * updated loopback example, spi takes dma directly * moved criticalsection guard out of spi to spi_pool * added paragraph to the release.md * rm fn to add / rm device from bus or update config * rm stored config from EspSpiDevice * fmt'd * grammer + changelog update * implements inverted chipselect for spi.rs #119 * device with optional cs + guarded soft_cs wrapper * fmt'd * add pre / post cs delay functionality for wrapper * no bus.finish for dev with no cs. partial fix #99 * spi driver renaming * updated naming + locking with &mut SpiDeviceDriver * updated naming + locking with &mut SpiDeviceDriver * clean up * updated CHANGELOG
An embedded-hal implementation for ESP32[-XX] + ESP-IDF
- This crate is intended for usage in ESP32[-XX] embedded projects that utilize and link with the ESP-IDF SDK.
- For embedded projects that don't need Rust STD support, WiFi or BLE (and thus don't link with the ESP-IDF SDK), please check esp-hal.
For more information, check out:
- The Rust on ESP Book
- The embedded-hal project
- The esp-hal project
- The esp-idf-template project
- The esp-idf-sys project
- The embedded-svc project
- The esp-idf-svc project
- The Rust for Xtensa toolchain
- The Rust-with-STD demo project
Hardware Notes
Each chip has a number of GPIO pins which are generally used by the SPI0 and SPI1 peripherals in order to connect external PSRAM and/or SPI Flash memory. The datasheets explicitly state that these are not recommended for use, however this crate includes them anyways for completeness.
Please refer to the table below to determine the pins which are not recommended for use for your chip.
| Chip | GPIOs |
|---|---|
| ESP32 | 6 - 11, 16 - 17 |
| ESP32-C3 | 12 - 17 |
| ESP32-S2 | 26 - 32 |
| ESP32-S3 | 26 - 32, 33 - 37* |
* When using Octal Flash and/or Octal PSRAM
Examples
The examples could be built and flashed conveniently with cargo-espflash. To run ledc-simple on an ESP32-C3:
$ cargo espflash --release --target riscv32imc-esp-espidf --example ledc-simple --monitor /dev/ttyUSB0
In order to run the examples on other chips you will most likely need to adapt at least the used pins.