Merge pull request #115 from esp-rs/feature/install-ulp

Install GCC toolchain for ULP coprocessors
This commit is contained in:
Sergio Gasquez Arcos 2022-12-27 10:10:11 +01:00 committed by GitHub
commit f06c8e0566
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3 changed files with 49 additions and 22 deletions

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@ -15,7 +15,7 @@ use espup::{
espidf::{
get_dist_path, get_install_path, get_tool_path, EspIdfRepo, DEFAULT_GIT_REPOSITORY,
},
gcc::{get_toolchain_name, Gcc},
gcc::{get_toolchain_name, Gcc, RISCV_GCC},
llvm::Llvm,
rust::{check_rust_installation, uninstall_riscv_target, Crate, RiscVTarget, XtensaRust},
Installable,
@ -194,7 +194,7 @@ async fn install(args: InstallOpts) -> Result<()> {
to_install.push(Box::new(llvm));
if targets.contains(&Target::ESP32C3) || targets.contains(&Target::ESP32C2) {
if targets.iter().any(|t| t.riscv()) {
let riscv_target = RiscVTarget::new(&args.nightly_version);
to_install.push(Box::new(riscv_target));
}
@ -210,16 +210,15 @@ async fn install(args: InstallOpts) -> Result<()> {
extra_crates = Some(crates);
};
} else {
for target in &targets {
if target == &Target::ESP32 || target == &Target::ESP32S2 || target == &Target::ESP32S3
{
targets.iter().for_each(|target| {
if target.xtensa() {
let gcc = Gcc::new(target, &host_triple);
to_install.push(Box::new(gcc));
}
}
if targets.contains(&Target::ESP32C3) || targets.contains(&Target::ESP32C2) {
let gcc = Gcc::new(&Target::ESP32C2, &host_triple);
to_install.push(Box::new(gcc));
});
if targets.iter().any(|t| t != &Target::ESP32) {
let riscv_gcc = Gcc::new_riscv(&host_triple);
to_install.push(Box::new(riscv_gcc));
}
}
@ -309,7 +308,7 @@ async fn uninstall(args: UninstallOpts) -> Result<()> {
.map_err(|_| Error::FailedToRemoveDirectory(llvm_path.display().to_string()))?;
}
if config.targets.contains(&Target::ESP32C3) || config.targets.contains(&Target::ESP32C2) {
if config.targets.iter().any(|t| t.riscv()) {
uninstall_riscv_target(&config.nightly_version)?;
}
@ -333,20 +332,22 @@ async fn uninstall(args: UninstallOpts) -> Result<()> {
})?;
} else {
info!("{} Deleting GCC targets", emoji::WRENCH);
if config.targets.contains(&Target::ESP32C3) || config.targets.contains(&Target::ESP32C2) {
if config.targets.iter().any(|t| t != &Target::ESP32) {
config.targets.remove(&Target::ESP32C3);
config.targets.remove(&Target::ESP32C2);
config.save()?;
// All RISC-V targets use the same GCC toolchain
let riscv_gcc_path = get_tool_path(&get_toolchain_name(&Target::ESP32C3));
let riscv_gcc_path = get_tool_path(RISCV_GCC);
remove_dir_all(&riscv_gcc_path)
.map_err(|_| Error::FailedToRemoveDirectory(riscv_gcc_path))?;
}
for target in &config.targets.clone() {
config.targets.remove(target);
config.save()?;
let gcc_path = get_tool_path(&get_toolchain_name(target));
remove_dir_all(&gcc_path).map_err(|_| Error::FailedToRemoveDirectory(gcc_path))?;
if target.xtensa() {
config.targets.remove(target);
config.save()?;
let gcc_path = get_tool_path(&get_toolchain_name(target));
remove_dir_all(&gcc_path).map_err(|_| Error::FailedToRemoveDirectory(gcc_path))?;
}
}
}

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@ -25,6 +25,16 @@ pub enum Target {
ESP32C3,
}
impl Target {
pub fn riscv(&self) -> bool {
!self.xtensa()
}
pub fn xtensa(&self) -> bool {
matches!(self, Target::ESP32 | Target::ESP32S2 | Target::ESP32S3)
}
}
/// Returns a vector of Chips from a comma or space separated string.
pub fn parse_targets(targets_str: &str) -> Result<HashSet<Target>, Error> {
debug!("{} Parsing targets: {}", emoji::DEBUG, targets_str);

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@ -17,6 +17,10 @@ use std::path::{Path, PathBuf};
const DEFAULT_GCC_REPOSITORY: &str = "https://github.com/espressif/crosstool-NG/releases/download";
const DEFAULT_GCC_RELEASE: &str = "esp-2021r2-patch5";
const DEFAULT_GCC_VERSION: &str = "8_4_0";
const ESP32_GCC: &str = "xtensa-esp32-elf";
const ESP32S2_GCC: &str = "xtensa-esp32s2-elf";
const ESP32S3_GCC: &str = "xtensa-esp32s3-elf";
pub const RISCV_GCC: &str = "riscv32-esp-elf";
#[derive(Debug, Clone)]
pub struct Gcc {
@ -52,6 +56,17 @@ impl Gcc {
version: DEFAULT_GCC_VERSION.to_string(),
}
}
/// Create a new instance of RISC-V GCC with default values and proper toolchain name.
pub fn new_riscv(host_triple: &HostTriple) -> Self {
Self {
host_triple: host_triple.clone(),
release: DEFAULT_GCC_RELEASE.to_string(),
repository_url: DEFAULT_GCC_REPOSITORY.to_string(),
toolchain_name: String::from("riscv32-esp-elf"),
version: DEFAULT_GCC_VERSION.to_string(),
}
}
}
#[async_trait]
@ -116,12 +131,13 @@ fn get_artifact_extension(host_triple: &HostTriple) -> &str {
/// Gets the toolchain name based on the Target
pub fn get_toolchain_name(target: &Target) -> String {
match target {
Target::ESP32 => "xtensa-esp32-elf".to_string(),
Target::ESP32S2 => "xtensa-esp32s2-elf".to_string(),
Target::ESP32S3 => "xtensa-esp32s3-elf".to_string(),
Target::ESP32C2 | Target::ESP32C3 => "riscv32-esp-elf".to_string(),
}
let toolchain = match target {
Target::ESP32 => ESP32_GCC,
Target::ESP32S2 => ESP32S2_GCC,
Target::ESP32S3 => ESP32S3_GCC,
Target::ESP32C2 | Target::ESP32C3 => RISCV_GCC,
};
toolchain.to_string()
}
/// Gets the toolchain name based on the Target