Fixed so pool and MPMC works on thumbv6

Cargo.toml

@@ -32,6 +32,9 @@ __trybuild = []
 [target.x86_64-unknown-linux-gnu.dev-dependencies]
 scoped_threadpool = "0.1.8"
 
+[target.thumbv6m-none-eabi.dependencies]
+atomic-polyfill = "0.1.2"
+
 [dependencies]
 hash32 = "0.1.0"
 

build.rs

@@ -24,10 +24,7 @@ fn main() -> Result<(), Box<dyn Error>> {
     // built-in targets with no atomic / CAS support as of nightly-2019-12-17
     // see the `no-atomics.sh` / `no-cas.sh` script sitting next to this file
     match &target[..] {
-        "thumbv6m-none-eabi"
-        | "msp430-none-elf"
-        | "riscv32i-unknown-none-elf"
-        | "riscv32imc-unknown-none-elf" => {}
+        "msp430-none-elf" | "riscv32i-unknown-none-elf" | "riscv32imc-unknown-none-elf" => {}
 
         _ => {
             println!("cargo:rustc-cfg=has_cas");

src/mpmc.rs

@@ -82,11 +82,13 @@
 //!
 //! [0]: http://www.1024cores.net/home/lock-free-algorithms/queues/bounded-mpmc-queue
 
-use core::{
-    cell::UnsafeCell,
-    mem::MaybeUninit,
-    sync::atomic::{AtomicU8, Ordering},
-};
+use core::{cell::UnsafeCell, mem::MaybeUninit};
+
+#[cfg(armv6m)]
+use atomic_polyfill::{AtomicU8, Ordering};
+
+#[cfg(not(armv6m))]
+use core::sync::atomic::{AtomicU8, Ordering};
 
 /// MPMC queue with a capacity for 2 elements
 pub struct Q2<T> {

src/pool/llsc.rs

@@ -1,11 +1,13 @@
 //! Stack based on LL/SC atomics
 
 pub use core::ptr::NonNull as Ptr;
-use core::{
-    cell::UnsafeCell,
-    ptr,
-    sync::atomic::{AtomicPtr, Ordering},
-};
+use core::{cell::UnsafeCell, ptr};
+
+#[cfg(armv6m)]
+use atomic_polyfill::{AtomicPtr, Ordering};
+
+#[cfg(not(armv6m))]
+use core::sync::atomic::{AtomicPtr, Ordering};
 
 /// Unfortunate implementation detail required to use the
 /// [`Pool.grow_exact`](struct.Pool.html#method.grow_exact) method