bors[bot] 02773a5b07
Merge #293
293: unconditionally depend on atomic-polyfill for riscv32i target r=japaric a=japaric

due to a limitation in the llvm backend [1] the `riscv32i-unknown-none-elf` target lacks the `core::sync::atomic` API even though the actual hardware is capable of atomic loads and stores (`fence` instruction). thus, at this point in time, this target needs `atomic-polyfill` for a working SPSC implementation

[1]: https://github.com/knurling-rs/defmt/issues/597#issuecomment-934467023

fixes #271 
closes #272 
closes #273 

Co-authored-by: Jorge Aparicio <jorge.aparicio@ferrous-systems.com>
2022-05-12 13:06:27 +00:00
2021-04-27 19:03:12 +02:00
2022-04-29 15:29:15 +02:00
2022-05-12 15:02:58 +02:00
2022-05-12 15:04:06 +02:00
2017-03-05 00:30:10 -05:00
2017-03-05 00:30:10 -05:00
2021-03-25 16:30:45 +01:00

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heapless

static friendly data structures that don't require dynamic memory allocation

Documentation

Change log

Tests

# run all
cargo test --features 'serde','x86-sync-pool'
# run only for example histbuf tests
cargo test histbuf --features 'serde','x86-sync-pool'

License

Licensed under either of

at your option.

Contribution

Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.

Description
Heapless, static friendly data structures
Readme 18 MiB
Languages
Rust 100%