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e44909d694
this changes the implementation of the underlying Treiber Stack to use LDREX and STREX on Cortex-v7A/R/M. other architectures are left unchanged in this PR. in principle, RISC-V could be implemented in a similar fashion but haven't tested that yet this does bump the MSRV so it's technically a breaking change ... to make this easier to maintain I'd like to drop the llsc.rs and make pool only available on targets where it implements Sync *and* it's sound but that's a API breaking change. there are other API breaking changes I'd like to make (e.g. remove the Uninit type state) so I'll write a RFC first fixes #180
heapless
staticfriendly data structures that don't require dynamic memory allocation
Documentation
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Tests
# run all
cargo test --features 'serde','x86-sync-pool'
# run only for example histbuf tests
cargo test histbuf --features 'serde','x86-sync-pool'
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Apache License, Version 2.0 (LICENSE-APACHE or http://www.apache.org/licenses/LICENSE-2.0)
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MIT license (LICENSE-MIT or http://opensource.org/licenses/MIT)
at your option.
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