9803 Commits

Author SHA1 Message Date
Ralf Jung
3287178d1f float::min/max: reference NaN bit pattern rules 2025-11-30 11:03:24 +01:00
bors
3c5c55864f Auto merge of #149441 - jhpratt:rollup-4hmqc0z, r=jhpratt
Rollup of 5 pull requests

Successful merges:

 - rust-lang/rust#147362 (Avoid suggesting constrain the associated type with unknown type)
 - rust-lang/rust#149395 (float::minimum/maximum: say which exact IEEE operation this corresponds to)
 - rust-lang/rust#149396 (Remove outdated comment)
 - rust-lang/rust#149421 (Add a regression test for issue 129865)
 - rust-lang/rust#149424 (Update books)

r? `@ghost`
`@rustbot` modify labels: rollup
2025-11-29 05:20:07 +00:00
Jacob Pratt
010da38d00
Rollup merge of #149395 - RalfJung:float-minimum, r=scottmcm
float::minimum/maximum: say which exact IEEE operation this corresponds to

There's both `minimum` and `minimumNumber`, so this seems worth clarifying.

Also use code font for these names to make it more clear that they are technical terms.
2025-11-28 21:22:24 -05:00
bors
467250ddb2 Auto merge of #144465 - orlp:system-alloc-tls, r=Mark-Simulacrum
Allow the global allocator to use thread-local storage and std:🧵:current()

Fixes https://github.com/rust-lang/rust/issues/115209.

Currently the thread-local storage implementation uses the `Global` allocator if it needs to allocate memory in some places. This effectively means the global allocator can not use thread-local variables. This is a shame as an allocator is precisely one of the locations where you'd *really* want to use thread-locals. We also see that this lead to hacks such as https://github.com/rust-lang/rust/pull/116402, where we detect re-entrance and abort.

So I've made the places where I could find allocation happening in the TLS implementation use the `System` allocator instead. I also applied this change to the storage allocated for a `Thread` handle so that it may be used care-free in the global allocator as well, for e.g. registering it to a central place or parking primitives.

r? `@joboet`
2025-11-29 02:08:53 +00:00
Stuart Cook
549c577c2a
Rollup merge of #149087 - nxsaken:unchecked_neg_shifts_stabilize, r=Amanieu
Stabilize `unchecked_neg` and `unchecked_shifts`

Features: `unchecked_neg`, `unchecked_shifts`
Tracking issue: rust-lang/rust#85122

r? `@Amanieu`
2025-11-28 15:30:43 +11:00
Orson Peters
f9b0811d01 Add documentation guaranteeing global allocator use of TLS
Remove outdated part of comment claiming thread_local re-enters global allocator

Fix typo in doc comment

Add comments for guarantees given and footnote that System may still be called

Revise mention of using the global allocator

Allow for the possibility that the global allocator is the system allocator.

Co-authored-by: Mark Rousskov <mark.simulacrum@gmail.com>
2025-11-28 00:09:12 +01:00
bors
c86564c412 Auto merge of #149397 - matthiaskrgr:rollup-go79y6a, r=matthiaskrgr
Rollup of 8 pull requests

Successful merges:

 - rust-lang/rust#147071 (constify from_fn, try_from_fn, try_map, map)
 - rust-lang/rust#148930 (tweak editor configs)
 - rust-lang/rust#149320 (-Znext-solver: normalize expected function input types when fudging)
 - rust-lang/rust#149363 (Port the `#![windows_subsystem]` attribute to the new attribute system)
 - rust-lang/rust#149378 (make run-make tests use 2024 edition by default)
 - rust-lang/rust#149381 (Add `impl TrustedLen` on `BTree{Map,Set}` iterators)
 - rust-lang/rust#149388 (remove session+blob decoder construction)
 - rust-lang/rust#149390 (`rust-analyzer` subtree update)

r? `@ghost`
`@rustbot` modify labels: rollup
2025-11-27 19:24:40 +00:00
Ralf Jung
be22161390 float::minimum/maximum: say which exact IEEE operation this corresponds to 2025-11-27 18:58:56 +01:00
Matthias Krüger
cdb678c165
Rollup merge of #148589 - yoshuawuyts:DropGuard-dismiss, r=joshtriplett
Rename `DropGuard::into_inner` to `DropGuard::dismiss`

Tracking issue: https://github.com/rust-lang/rust/issues/144426

One of the open questions blocking the stabilization of `DropGuard` is what to name the associated method that prevents the destructor from running, and returns the captured value. This method is currently called `into_inner`, but most people (including myself) feel like this would benefit from a method that calls more attention to itself.

This PR proposes naming this method `dismiss`, after the Linux kernel's [`ScopeGuard::dismiss`](https://rust.docs.kernel.org/kernel/types/struct.ScopeGuard.html#method.dismiss). Which crucially does not evoke images of violence or weaponry the way alternatives such as "disarm" or "defuse" do. And personally I enjoy the visual metaphor of "dismissing a guard" (e.g. a person keeping watch over something) - a job well done, they're free to go.

This PR also changes the signature from an static method to an instance method. This also matches the Linux kernel's API, and seems alright since `dismiss` is not nearly as ubiquitous as `into_inner`. This makes it more convenient to use, with a much lower risk of conflicting. Though in the rare case there might be ambiguity, the explicit notation is available as a fallback.

```rust
let x = DropGuard::into_inner(guard);  // ← current
let x = guard.dismiss();               // ← proposed
2025-11-27 15:59:11 +01:00
bendn
e3a2c23e37
redo the drain 2025-11-27 20:18:13 +07:00
bendn
1d718e20ac
constify from_fn, try_from_fn, try_map, map 2025-11-27 20:16:46 +07:00
bors
7b9905edb4 Auto merge of #149370 - Zalathar:rollup-6fkk5x4, r=Zalathar
Rollup of 8 pull requests

Successful merges:

 - rust-lang/rust#149238 (float:🗜️ make treatment of signed zeros unspecified)
 - rust-lang/rust#149270 (implement `Iterator::{exactly_one, collect_array}`)
 - rust-lang/rust#149295 (Suggest _bytes versions of endian-converting methods)
 - rust-lang/rust#149332 (fix rustdoc search says “Consider searching for "null" instead.” rust-lang/rust#149324)
 - rust-lang/rust#149349 (Fix typo in comment.)
 - rust-lang/rust#149353 (Tidying up UI tests [3/N])
 - rust-lang/rust#149355 (Document that `build.description` affects symbol mangling and crate IDs)
 - rust-lang/rust#149360 (Enable CI download for windows-gnullvm)

r? `@ghost`
`@rustbot` modify labels: rollup
2025-11-27 07:30:25 +00:00
Stuart Cook
4fca7c587c
Rollup merge of #149349 - m-ou-se:fmt-arg-comment-typo, r=Mark-Simulacrum
Fix typo in comment.
2025-11-27 15:47:10 +11:00
Stuart Cook
463eebaa6e
Rollup merge of #149295 - kornelski:endian_bytes, r=Mark-Simulacrum
Suggest _bytes versions of endian-converting methods

As pointed out [in this article](https://purplesyringa.moe/blog/ntoh-hton-is-a-bad-api/), the `int.to_be()`/`int.to_le()` functions are technically returning a wrong type, because endian-specific representations of integers and Rust's always-native-endian integers are different things.

I wanted to make the docs state more directly that byte swapping will result in the type having a "wrong" value, but I wasn't sure whether to delve into the special case of palindrome-like values (`0x12343412`) not changing.

I've updated the docs to suggest `{to,from}_[lb]e_bytes()` instead. These methods use `[u8; _]` for endian-specific representations, which is a different type than the native-endian `u16`/`u32`/`u64`, and this is a type-safety improvement.
2025-11-27 15:47:09 +11:00
Stuart Cook
3a62a46006
Rollup merge of #149270 - jdonszelmann:exact-length-collection, r=Mark-Simulacrum
implement `Iterator::{exactly_one, collect_array}`

As per https://github.com/rust-lang/rust/issues/149266
2025-11-27 15:47:08 +11:00
Stuart Cook
13c2640ecc
Rollup merge of #149238 - RalfJung:clamp-signed-zeros, r=Amanieu
float:🗜️ make treatment of signed zeros unspecified

Fixes https://github.com/rust-lang/rust/issues/83984 by explicitly documenting that we do not specify the treatment of signed zeros in `clamp`. `@rust-lang/libs-api` Is this what you'd like to see?

Cc `@tgross35` `@thomcc`
2025-11-27 15:47:08 +11:00
Stuart Cook
df6f24cc51
Rollup merge of #149239 - RalfJung:float-intrinsics, r=tgross35
clarify float min/max behavios for NaNs and signed zeros

The first comment is internal, it only documents the intrinsics to more clearly say what they do.
This makes the currently implemented semantics more explicit, so one does not have to go look for the publicly exposed version of the operation to figure out what exactly should happen.

The second commit adds a NaN test to the doc comment for `min`/`max`, which matches what we already have for `minimum`/`maximum`.
2025-11-27 12:36:52 +11:00
Stuart Cook
a8007e622b
Rollup merge of #149131 - bend-n:optimize_slice_iter_next_chunk, r=Mark-Simulacrum
optimize `slice::Iter::next_chunk`

codegen for example (sourced from https://github.com/rust-lang/rust/issues/98326#issuecomment-2559516886)
```rust
pub fn simd_sum_slow(arr: &[u32]) -> u32 {
    const STEP_SIZE: usize = 16;

    let mut result = [0; STEP_SIZE];

    let mut iter = arr.iter();

    while let Ok(c) = iter.next_chunk::<STEP_SIZE>() {
        for (&n, r) in c.iter().zip(result.iter_mut()) {
            *r += n;
        }
    }

    result.iter().sum()
}
```
goes from (znver4)

<details>
<summary>many asm</summary>

```assembly
simd_sum_slow:
	.cfi_startproc
	push rbp
	.cfi_def_cfa_offset 16
	push r15
	.cfi_def_cfa_offset 24
	push r14
	.cfi_def_cfa_offset 32
	push r13
	.cfi_def_cfa_offset 40
	push r12
	.cfi_def_cfa_offset 48
	push rbx
	.cfi_def_cfa_offset 56
	sub rsp, 240
	.cfi_def_cfa_offset 296
	.cfi_offset rbx, -56
	.cfi_offset r12, -48
	.cfi_offset r13, -40
	.cfi_offset r14, -32
	.cfi_offset r15, -24
	.cfi_offset rbp, -16
	lea r12, [rdi + 4*rsi]
	mov qword ptr [rsp - 32], 0
	mov dword ptr [rsp - 88], 0
	mov dword ptr [rsp - 100], 0
	mov dword ptr [rsp - 72], 0
	mov dword ptr [rsp - 96], 0
	mov dword ptr [rsp - 92], 0
	mov dword ptr [rsp - 52], 0
	mov dword ptr [rsp - 84], 0
	mov dword ptr [rsp - 80], 0
	mov dword ptr [rsp - 76], 0
	mov dword ptr [rsp - 44], 0
	mov dword ptr [rsp - 68], 0
	mov dword ptr [rsp - 64], 0
	mov dword ptr [rsp - 60], 0
	mov dword ptr [rsp - 56], 0
	mov dword ptr [rsp - 48], 0
	mov qword ptr [rsp + 224], r12
	cmp rdi, r12
	mov qword ptr [rsp + 96], rdi
	je .LBB12_2
	.p2align	4
.LBB12_3:
	lea r13, [rdi + 4]
	cmp r13, r12
	je .LBB12_4
	lea r15, [rdi + 8]
	cmp r15, r12
	je .LBB12_6
	lea r14, [rdi + 12]
	cmp r14, r12
	je .LBB12_8
	lea rbx, [rdi + 16]
	cmp rbx, r12
	je .LBB12_10
	lea r11, [rdi + 20]
	cmp r11, r12
	je .LBB12_12
	lea r10, [rdi + 24]
	cmp r10, r12
	je .LBB12_14
	lea r9, [rdi + 28]
	cmp r9, r12
	je .LBB12_16
	lea r8, [rdi + 32]
	cmp r8, r12
	je .LBB12_18
	lea rax, [rdi + 36]
	cmp rax, r12
	je .LBB12_20
	mov qword ptr [rsp - 120], rax
	lea rax, [rdi + 40]
	mov qword ptr [rsp - 112], rax
	cmp rax, r12
	je .LBB12_22
	lea rdx, [rdi + 44]
	cmp rdx, r12
	je .LBB12_24
	lea rbp, [rdi + 48]
	cmp rbp, r12
	je .LBB12_26
	mov qword ptr [rsp - 40], r9
	lea rcx, [rdi + 52]
	cmp rcx, r12
	je .LBB12_30
	lea r9, [rdi + 56]
	cmp r9, r12
	je .LBB12_32
	lea rax, [rdi + 60]
	cmp rax, r12
	mov qword ptr [rsp - 24], r9
	je .LBB12_34
	mov qword ptr [rsp + 88], rax
	lea rax, [rdi + 64]
	mov qword ptr [rsp - 8], rax
	mov dword ptr [rsp - 128], 0
	mov qword ptr [rsp - 16], rdi
	mov qword ptr [rsp + 56], r10
	lea r10, [rsp + 216]
	mov qword ptr [rsp + 40], r10
	mov qword ptr [rsp + 96], r13
	lea rax, [rsp + 208]
	mov qword ptr [rsp + 32], rax
	mov qword ptr [rsp + 72], rdx
	lea rsi, [rsp + 200]
	mov qword ptr [rsp + 48], rbx
	lea rbx, [rsp + 192]
	mov qword ptr [rsp + 80], rcx
	lea rcx, [rsp + 184]
	mov qword ptr [rsp + 64], rbp
	lea rdx, [rsp + 176]
	mov qword ptr [rsp + 16], r14
	lea r14, [rsp + 168]
	mov qword ptr [rsp + 24], r11
	lea r11, [rsp + 160]
	lea r9, [rsp + 152]
	lea r12, [rsp + 144]
	lea r13, [rsp + 136]
	lea rbp, [rsp + 128]
	mov qword ptr [rsp], r15
	lea r15, [rsp + 120]
	mov qword ptr [rsp + 8], r8
	lea r8, [rsp + 112]
	lea rdi, [rsp + 104]
	jmp .LBB12_39
	.p2align	4
.LBB12_2:
	mov qword ptr [rsp - 128], 0
	jmp .LBB12_37
	.p2align	4
.LBB12_4:
	mov eax, 1
	mov qword ptr [rsp - 128], rax
	jmp .LBB12_37
	.p2align	4
.LBB12_6:
	mov eax, 2
	mov qword ptr [rsp - 128], rax
	jmp .LBB12_36
.LBB12_8:
	mov eax, 3
	mov qword ptr [rsp - 128], rax
	jmp .LBB12_36
.LBB12_10:
	mov eax, 4
	mov qword ptr [rsp - 128], rax
	jmp .LBB12_36
.LBB12_12:
	mov eax, 5
	mov qword ptr [rsp - 128], rax
	jmp .LBB12_36
.LBB12_14:
	mov eax, 6
	mov qword ptr [rsp - 128], rax
	jmp .LBB12_36
.LBB12_16:
	mov eax, 7
	mov qword ptr [rsp - 128], rax
	jmp .LBB12_36
.LBB12_18:
	mov eax, 8
	mov qword ptr [rsp - 128], rax
	jmp .LBB12_36
.LBB12_20:
	mov eax, 9
	mov qword ptr [rsp - 128], rax
	jmp .LBB12_36
.LBB12_22:
	mov eax, 10
	mov qword ptr [rsp - 128], rax
	mov rdi, qword ptr [rsp - 120]
	jmp .LBB12_36
.LBB12_24:
	mov eax, 11
	mov qword ptr [rsp - 128], rax
	jmp .LBB12_27
.LBB12_26:
	mov eax, 12
	mov qword ptr [rsp - 128], rax
.LBB12_27:
	mov rsi, qword ptr [rsp - 112]
	mov rdi, qword ptr [rsp - 120]
	jmp .LBB12_36
.LBB12_30:
	mov rcx, rbp
	mov eax, 13
	mov qword ptr [rsp - 128], rax
	jmp .LBB12_35
.LBB12_32:
	mov rax, rcx
	mov rcx, rbp
	mov esi, 14
	mov qword ptr [rsp - 128], rsi
	jmp .LBB12_35
.LBB12_34:
	mov rax, rcx
	mov rcx, rbp
	mov esi, 15
	mov qword ptr [rsp - 128], rsi
.LBB12_35:
	mov rsi, qword ptr [rsp - 112]
	mov rdi, qword ptr [rsp - 120]
	mov r9, qword ptr [rsp - 40]
	.p2align	4
.LBB12_36:
	mov rbp, r13
.LBB12_37:
	mov r13, qword ptr [rsp - 24]
	mov qword ptr [rsp + 88], r13
	mov r13, qword ptr [rsp - 128]
	mov qword ptr [rsp + 216], r13
	mov r13b, 1
	mov dword ptr [rsp - 128], r13d
	mov qword ptr [rsp - 24], rax
	mov qword ptr [rsp + 80], rcx
	mov qword ptr [rsp + 64], rdx
	mov qword ptr [rsp + 72], rsi
	mov qword ptr [rsp - 112], rdi
	mov qword ptr [rsp - 120], r8
	mov qword ptr [rsp + 8], r9
	mov qword ptr [rsp - 40], r10
	mov qword ptr [rsp + 56], r11
	mov qword ptr [rsp + 24], rbx
	mov qword ptr [rsp + 48], r14
	mov qword ptr [rsp + 16], r15
	mov qword ptr [rsp], rbp
	mov eax, 0
	mov qword ptr [rsp - 16], rax
	mov qword ptr [rsp - 8], r12
	lea r10, [rsp + 208]
	mov qword ptr [rsp + 40], r10
	lea rax, [rsp + 200]
	mov qword ptr [rsp + 32], rax
	lea rsi, [rsp + 192]
	lea rbx, [rsp + 184]
	lea rcx, [rsp + 176]
	lea rdx, [rsp + 168]
	lea r14, [rsp + 160]
	lea r11, [rsp + 152]
	lea r9, [rsp + 144]
	lea r12, [rsp + 136]
	lea r13, [rsp + 128]
	lea rbp, [rsp + 120]
	lea r15, [rsp + 112]
	lea r8, [rsp + 104]
	lea rdi, [rsp + 232]
.LBB12_39:
	mov r10, qword ptr [rsp + 96]
	mov rax, qword ptr [rsp + 40]
	mov qword ptr [rax], r10
	mov rax, qword ptr [rsp + 32]
	mov r10, qword ptr [rsp]
	mov qword ptr [rax], r10
	mov rax, qword ptr [rsp + 16]
	mov qword ptr [rsi], rax
	mov rax, qword ptr [rsp + 48]
	mov qword ptr [rbx], rax
	mov rax, qword ptr [rsp + 24]
	mov qword ptr [rcx], rax
	mov rax, qword ptr [rsp + 56]
	mov qword ptr [rdx], rax
	mov rax, qword ptr [rsp - 40]
	mov qword ptr [r14], rax
	mov rax, qword ptr [rsp + 8]
	mov qword ptr [r11], rax
	mov rax, qword ptr [rsp - 120]
	mov qword ptr [r9], rax
	mov rax, qword ptr [rsp - 112]
	mov qword ptr [r12], rax
	mov rax, qword ptr [rsp + 72]
	mov qword ptr [r13], rax
	mov rax, qword ptr [rsp + 64]
	mov qword ptr [rbp], rax
	mov rax, qword ptr [rsp + 80]
	mov qword ptr [r15], rax
	mov rax, qword ptr [rsp - 24]
	mov qword ptr [r8], rax
	mov rax, qword ptr [rsp + 88]
	mov qword ptr [rdi], rax
	cmp byte ptr [rsp - 128], 0
	jne .LBB12_40
	mov rax, qword ptr [rsp - 32]
	mov rcx, qword ptr [rsp - 16]
	add eax, dword ptr [rcx]
	mov qword ptr [rsp - 32], rax
	mov rax, qword ptr [rsp + 216]
	mov ecx, dword ptr [rsp - 88]
	add ecx, dword ptr [rax]
	mov dword ptr [rsp - 88], ecx
	mov rax, qword ptr [rsp + 208]
	mov ecx, dword ptr [rsp - 100]
	add ecx, dword ptr [rax]
	mov dword ptr [rsp - 100], ecx
	mov rax, qword ptr [rsp + 200]
	mov ecx, dword ptr [rsp - 72]
	add ecx, dword ptr [rax]
	mov dword ptr [rsp - 72], ecx
	mov rax, qword ptr [rsp + 192]
	mov ecx, dword ptr [rsp - 96]
	add ecx, dword ptr [rax]
	mov dword ptr [rsp - 96], ecx
	mov rax, qword ptr [rsp + 184]
	mov ecx, dword ptr [rsp - 92]
	add ecx, dword ptr [rax]
	mov dword ptr [rsp - 92], ecx
	mov rax, qword ptr [rsp + 176]
	mov ecx, dword ptr [rsp - 52]
	add ecx, dword ptr [rax]
	mov dword ptr [rsp - 52], ecx
	mov rax, qword ptr [rsp + 168]
	mov ecx, dword ptr [rsp - 84]
	add ecx, dword ptr [rax]
	mov dword ptr [rsp - 84], ecx
	mov rax, qword ptr [rsp + 160]
	mov ecx, dword ptr [rsp - 80]
	add ecx, dword ptr [rax]
	mov dword ptr [rsp - 80], ecx
	mov rax, qword ptr [rsp + 152]
	mov ecx, dword ptr [rsp - 76]
	add ecx, dword ptr [rax]
	mov dword ptr [rsp - 76], ecx
	mov rax, qword ptr [rsp + 144]
	mov ecx, dword ptr [rsp - 44]
	add ecx, dword ptr [rax]
	mov dword ptr [rsp - 44], ecx
	mov rax, qword ptr [rsp + 136]
	mov ecx, dword ptr [rsp - 68]
	add ecx, dword ptr [rax]
	mov dword ptr [rsp - 68], ecx
	mov rax, qword ptr [rsp + 128]
	mov ecx, dword ptr [rsp - 64]
	add ecx, dword ptr [rax]
	mov dword ptr [rsp - 64], ecx
	mov rax, qword ptr [rsp + 120]
	mov ecx, dword ptr [rsp - 60]
	add ecx, dword ptr [rax]
	mov dword ptr [rsp - 60], ecx
	mov rax, qword ptr [rsp + 112]
	mov ecx, dword ptr [rsp - 56]
	add ecx, dword ptr [rax]
	mov dword ptr [rsp - 56], ecx
	mov rax, qword ptr [rsp + 104]
	mov ecx, dword ptr [rsp - 48]
	add ecx, dword ptr [rax]
	mov dword ptr [rsp - 48], ecx
	mov rdi, qword ptr [rsp - 8]
	mov r12, qword ptr [rsp + 224]
	cmp rdi, r12
	mov qword ptr [rsp + 96], rdi
	jne .LBB12_3
	jmp .LBB12_2
.LBB12_40:
	mov eax, dword ptr [rsp - 88]
	add eax, dword ptr [rsp - 32]
	mov ecx, dword ptr [rsp - 72]
	add ecx, dword ptr [rsp - 100]
	add ecx, eax
	mov edx, dword ptr [rsp - 92]
	add edx, dword ptr [rsp - 96]
	mov eax, dword ptr [rsp - 52]
	add eax, edx
	add eax, ecx
	mov ecx, dword ptr [rsp - 80]
	add ecx, dword ptr [rsp - 84]
	mov edx, dword ptr [rsp - 76]
	add edx, ecx
	mov ecx, dword ptr [rsp - 44]
	add ecx, edx
	add ecx, eax
	mov edx, dword ptr [rsp - 64]
	add edx, dword ptr [rsp - 68]
	mov eax, dword ptr [rsp - 60]
	add eax, edx
	mov edx, dword ptr [rsp - 56]
	add edx, eax
	mov eax, dword ptr [rsp - 48]
	add eax, edx
	add eax, ecx
	add rsp, 240
	.cfi_def_cfa_offset 56
	pop rbx
	.cfi_def_cfa_offset 48
	pop r12
	.cfi_def_cfa_offset 40
	pop r13
	.cfi_def_cfa_offset 32
	pop r14
	.cfi_def_cfa_offset 24
	pop r15
	.cfi_def_cfa_offset 16
	pop rbp
	.cfi_def_cfa_offset 8
	ret
```

</details>

to
```assembly
simd_sum_slow:
	.cfi_startproc
	xor eax, eax
	cmp rsi, 16
	jb .LBB12_4
	shl rsi, 2
	pxor xmm0, xmm0
	pxor xmm1, xmm1
	pxor xmm3, xmm3
	pxor xmm2, xmm2
	.p2align	4
.LBB12_2:
	movdqu xmm4, xmmword ptr [rdi]
	paddd xmm0, xmm4
	movdqu xmm4, xmmword ptr [rdi + 16]
	paddd xmm1, xmm4
	movdqu xmm4, xmmword ptr [rdi + 32]
	paddd xmm3, xmm4
	movdqu xmm4, xmmword ptr [rdi + 48]
	paddd xmm2, xmm4
	add rdi, 64
	add rsi, -64
	cmp rsi, 60
	ja .LBB12_2
	paddd xmm0, xmm3
	paddd xmm1, xmm2
	paddd xmm1, xmm0
	pshufd xmm0, xmm1, 238
	paddd xmm0, xmm1
	pshufd xmm1, xmm0, 85
	paddd xmm1, xmm0
	movd eax, xmm1
.LBB12_4:
	ret
```
2025-11-27 12:36:51 +11:00
Stuart Cook
e3ecd4530b
Rollup merge of #149097 - okaneco:gather_scatter_bits, r=Mark-Simulacrum
num: Implement `uint_gather_scatter_bits` feature for unsigned integers

Feature gate: `#![feature(uint_gather_scatter_bits)]`
Tracking issue: https://github.com/rust-lang/rust/issues/149069
Accepted ACP: https://github.com/rust-lang/libs-team/issues/695#issuecomment-3549284861

Implement `gather_bits`, `scatter_bits` functions on unsigned integers
Add tests to coretests

This implementation is a small improvement over the plain naive form (see the [solution sketch](https://github.com/rust-lang/libs-team/issues/695)).
We only check the set bits in the mask instead of iterating over every bit.
2025-11-27 12:36:50 +11:00
Stuart Cook
e4cd17cd44
Rollup merge of #148641 - oli-obk:push-olzwqxsmnxmz, r=jackh726
Add a diagnostic attribute for special casing const bound errors for non-const impls

Somewhat of a follow-up to https://github.com/rust-lang/rust/pull/144194

My plan is to resolve

f4e19c6878/compiler/rustc_hir_typeck/src/callee.rs (L907-913)

but doing so without being able to mark impls the way I do in this PR wrould cause all nice diagnostics about for loops and pointer comparisons to just be a `*const u32 does not implement [const] PartialEq` errors.
2025-11-27 12:36:48 +11:00
Stuart Cook
a32d3103d5
Rollup merge of #148048 - thaliaarchi:stabilize-maybeuninit-write-slice, r=Mark-Simulacrum
Stabilize `maybe_uninit_write_slice`

Stabilize feature `maybe_uninit_write_slice` (closes https://github.com/rust-lang/rust/issues/79995).

Note that this also const-stabilizes `<[MaybeUninit<_>]>::write_copy_of_slice`. That method depends on `<[_]>::copy_from_slice`, which is already const-stable, and `<[MaybeUninit<_>]>::assume_init_mut` which is now also stable.
2025-11-27 12:36:48 +11:00
bendn
9a48fb6f79
optimize slice::Iter::next_chunk 2025-11-27 00:21:17 +07:00
Stuart Cook
2b150f2c65
Rollup merge of #147936 - Sa4dUs:offload-intrinsic, r=ZuseZ4
Offload intrinsic

This PR implements the minimal mechanisms required to run a small subset of arbitrary offload kernels without relying on hardcoded names or metadata.

- `offload(kernel, (..args))`: an intrinsic that generates the necessary host-side LLVM-IR code.
- `rustc_offload_kernel`: a builtin attribute that marks device kernels to be handled appropriately.

Example usage (pseudocode):
```rust
fn kernel(x: *mut [f64; 128]) {
    core::intrinsics::offload(kernel_1, (x,))
}

#[cfg(target_os = "linux")]
extern "C" {
    pub fn kernel_1(array_b: *mut [f64; 128]);
}

#[cfg(not(target_os = "linux"))]
#[rustc_offload_kernel]
extern "gpu-kernel" fn kernel_1(x: *mut [f64; 128]) {
    unsafe { (*x)[0] = 21.0 };
}
```
2025-11-26 23:32:03 +11:00
Mara Bos
e49f9615ce Fix typo in comment. 2025-11-26 12:38:03 +01:00
Ralf Jung
69d3218ca2 float:🗜️ make treatment of signed zeros unspecified 2025-11-26 09:38:55 +01:00
Oli Scherer
9218298caa Add a diagnostic attribute for special casing const bound errors for non-const impls 2025-11-26 07:40:47 +00:00
Marcelo Domínguez
f39ec4756f Update rustc-dev-guide 2025-11-25 20:06:30 +01:00
Marcelo Domínguez
5128ce10a0 Implement offload intrinsic 2025-11-25 20:04:27 +01:00
tison
a700e47675
Simplify OnceCell Clone impl
Signed-off-by: tison <wander4096@gmail.com>
2025-11-25 15:16:43 +08:00
Kornel
3faad7cc41
Suggest _bytes versions of endian-converting methods 2025-11-25 00:57:50 +00:00
okaneco
7f89192f36 num: Implement uint_gather_scatter_bits feature for unsigned integers
Implement `gather_bits`, `scatter_bits` functions on unsigned integers
Add tests to coretests
2025-11-24 10:03:44 -05:00
Jana Dönszelmann
699184bba4
implement and test Iterator::{exactly_one, collect_array} 2025-11-24 15:04:35 +01:00
Ralf Jung
15290faee5 add NaN examples to public min/max functions 2025-11-24 08:25:51 +01:00
Ralf Jung
8b87b25c80 intrinsics: clarify float min/max behavios for NaNs and signed zeros 2025-11-24 08:21:19 +01:00
Urgau
0e8d1e1f8e Add #[rustc_should_not_be_called_on_const_items] to std methods 2025-11-22 14:48:35 +01:00
Stuart Cook
e7b9935fc5
Rollup merge of #149135 - nxsaken:const_residual_into_try_type, r=scottmcm
Constify `residual_into_try_type`

Feature: `const_try_residual` (related to `try_trait_v2_residual`)
Tracking issue: rust-lang/rust#91285

Constify `residual_into_try_type` introduced in rust-lang/rust#148725.

r? ``@scottmcm``
2025-11-21 14:44:43 +11:00
Stuart Cook
f8bc31a804
Rollup merge of #149127 - bend-n:iter_array_chunks_into_remainder_is_non_optional, r=dtolnay
unwrap ret ty of `iter::ArrayChunks::into_remainder`

changes [`iter::ArrayChunks::into_remainder`](https://github.com/rust-lang/rust/issues/100450) to return `array::IntoIter` instead of `Option<array::IntoIter>` as suggested by [`@WaffleLapkin](https://github.com/rust-lang/rust/issues/100450#issuecomment-3555519025)`
2025-11-21 14:44:42 +11:00
bors
53732d5e07 Auto merge of #149109 - scottmcm:align-always-alignment, r=tgross35
See if this is the time we can remove `layout::size_align`

This was a bad idea before, but now that `size_of` and `align_of` work completely differently than when removing it was first tried in 2020, maybe it makes sense now.

(Or maybe I'll just add another attempt to the list in the comments...)

r? ghost
2025-11-20 19:01:43 +00:00
bors
7281a3bc4b Auto merge of #149132 - matthiaskrgr:rollup-8khp9s2, r=matthiaskrgr
Rollup of 9 pull requests

Successful merges:

 - rust-lang/rust#146925 (Add doc for va_list APIs)
 - rust-lang/rust#147035 (alloc: fix `Debug` implementation of `ExtractIf`)
 - rust-lang/rust#147173 (Add support for hexagon-unknown-qurt target)
 - rust-lang/rust#148261 (rustc_public: Make Id types !Send / !Sync)
 - rust-lang/rust#149041 (ignore unsized types in mips64 and sparc64 callconvs)
 - rust-lang/rust#149056 (fix the fragment_in_dst_padding_gets_overwritten test on s390x)
 - rust-lang/rust#149071 (Add test scaffolding for the `remote-test-client`)
 - rust-lang/rust#149095 (rustc-dev-guide subtree update)
 - rust-lang/rust#149108 ([AIX][ppc64le-linux-gnu] Add Amy Kwan to target maintainers)

r? `@ghost`
`@rustbot` modify labels: rollup
2025-11-20 13:25:16 +00:00
nxsaken
5590d7db51 Constify residual_into_try_type 2025-11-20 15:08:11 +04:00
Matthias Krüger
2eeec770fe
Rollup merge of #146925 - DiuDiu777:va-doc-fix, r=tgross35
Add doc for va_list APIs

I observed that [PR146521](https://github.com/rust-lang/rust/pull/146521) submitted two weeks ago resolved some documentation issues related to `VaListImpl`, similar to the previous [PR136969](https://github.com/rust-lang/rust/pull/136969).

This PR specifically adds requirements about argument availability for `VaListImpl::arg`, and also adds safety descriptions to the three associated intrinsic APIs.
2025-11-20 11:15:49 +01:00
bors
2c0f4860cc Auto merge of #149118 - folkertdev:stdarch-sync-2025-11-19, r=tgross35
stdarch subtree update

Subtree update of `stdarch` to 50134e10cb.

Created using https://github.com/rust-lang/josh-sync.

The only interesting commit is the final one, which enables the `avx10_target_feature` feature in the standard library, because it is now used in `stdarch`.

r? `@sayantn` (or whoever, this is just a straightforward sync)
2025-11-20 10:08:24 +00:00
bendn
68abe69f13
iter::ArrayChunks::into_remainder ought not return option 2025-11-20 15:27:57 +07:00
Folkert de Vries
ae682a3862
enable avx10_target_feature in core (used by stdarch) 2025-11-20 00:27:56 +01:00
Scott McMurray
30f4a2ae16 See if this is the time we can remove layout::size_align
This was a bad idea before, but now that `size_of` and `align_of` work completely differently than when removing it was first tried in 2020, maybe it makes sense now.

(Or maybe I'll just add another attempt to the list in the comments...)
2025-11-19 12:55:21 -08:00
nxsaken
47153b5276 Stabilize unchecked_neg and unchecked_shifts 2025-11-19 13:19:22 +04:00
Matthias Krüger
48fa9138c3
Rollup merge of #148798 - tamird:esc-single-quote, r=Amanieu
Match <OsString as Debug>::fmt to that of str

Fixes rust-lang/rust#114583.
2025-11-19 09:48:10 +01:00
Matthias Krüger
8b7479003b
Rollup merge of #148797 - sorairolake:feature/non-zero-uint-bit-width, r=scottmcm
feat: Add `bit_width` for unsigned `NonZero<T>`

- Tracking issue: rust-lang/rust#142326

This pull request adds a method to the unsigned `NonZero<T>` that return the minimum number of bits required to represent a value.

This can be achieved by using the `get` method and the methods added in rust-lang/rust#142328, but I think adding the `NonZero::bit_width` method is useful because it accomplishes the same thing a little more succinctly.
2025-11-19 09:48:09 +01:00
Matthias Krüger
3732c3c068
Rollup merge of #148201 - ZuseZ4:autodiff-activity-docs, r=oli-obk
Start documenting autodiff activities

Some initial documentation of the autodiff macros and usage examples
2025-11-19 09:48:08 +01:00
Matthias Krüger
714f1cea15
Rollup merge of #147521 - sayantn:simd-const-intrinsics, r=madsmtm
Make SIMD intrinsics available in `const`-contexts

successor to rust-lang/rust#146568, this PR actually makes the SIMD intrinsics `const`, and modifies the tests to test the const-eval implementations

r? `@tgross35` ig (although feel free to reassign, this is not anything targeted really)
2025-11-19 09:48:07 +01:00