244 Commits

Author SHA1 Message Date
Daniel Smith
02e1736720
Fix or equals integer comparisons (#872) 2020-07-04 05:41:25 +01:00
Daniel Smith
0108cb216a
Make function signatures consistent (#871) 2020-07-04 03:27:06 +01:00
Daniel Smith
5ff50904d8
Add AVX 512f gather, scatter and compare intrinsics (#866)
Co-authored-by: bjorn3 <bjorn3@users.noreply.github.com>
2020-06-16 17:49:21 +01:00
Jethro Beekman
a214956fe5 Fix x86 extract_epi{8,16} functions
* Update Intel intrinsics definitions with the latest version
* Update _mm256_extract_epi{8,16} to match latest definition
* Fix _mm_extract_epi16 sign extension

Fixes #867
2020-06-09 12:29:01 +01:00
Narek Galstyan
6f8baeb427 Clarify documentation about wasm32 target_feature gates 2020-06-04 09:01:01 +02:00
Daniel Smith
9b3358fc66 Add missing spaces 2020-05-31 19:46:40 +01:00
Daniel Smith
05cf0ce56b s/unsigned/signed/ for epi64 2020-05-31 19:46:40 +01:00
Daniel Smith
dde41d5863 Fix comparison comments 2020-05-31 19:46:40 +01:00
Daniel Smith
e0d2a25d24 Add 64 bit AVX512f le and ge comparisons 2020-05-30 21:50:51 +01:00
Mahmut Bulut
f4cdbb3005 Disable bootstrap for stage0 2020-05-29 21:29:04 +01:00
Mahmut Bulut
4541757677 feature detection 2020-05-29 19:05:48 +01:00
Mahmut Bulut
5b8bd0661a Fix cancellation code arithmetic 2020-05-29 19:05:48 +01:00
Mahmut Bulut
17e4b29dfd Implementation for Aarch64 TME intrinsics 2020-05-29 19:05:48 +01:00
Daniel Smith
a50a216567 Add signed variants 2020-05-29 00:07:03 +01:00
Daniel Smith
d94bc946eb Add gt and eq unsigned variants 2020-05-29 00:07:03 +01:00
Daniel Smith
22a73da688 Add mask variant to cmplt 2020-05-29 00:07:03 +01:00
Daniel Smith
b8e492f5a0 finish/fix adding avx512f to x86_64 2020-05-29 00:07:03 +01:00
Daniel Smith
fa03c0cdaf rustfmt 2020-05-29 00:07:03 +01:00
Daniel Smith
c382acd251 Only check for the instruction prefix since MSVC and Clang use different instructions 2020-05-29 00:07:03 +01:00
Daniel Smith
ad2fe20a87 Use correct instruction 2020-05-29 00:07:03 +01:00
Daniel Smith
2d717c3623 Fix stdarch-verify test 2020-05-29 00:07:03 +01:00
Daniel Smith
7ab646ef42 Move 64 bit function based on stdarch-verify 2020-05-29 00:07:03 +01:00
Daniel Smith
e0ffa88fe7 Add one AVX512f comparison and the intrinsics needed to test it 2020-05-29 00:07:03 +01:00
Daniel Smith
7a29fcc1c8 Convert __mmask16 to use an unsigned type 2020-05-28 22:24:46 +01:00
Marko Mijalkovic
15154a882d Use fp64 detection instead of OS blacklist 2020-05-07 20:48:47 +01:00
Marko Mijalkovic
66ef866b34 Fix code style 2020-05-07 20:48:47 +01:00
Marko Mijalkovic
aaee0709b3 Fix building libcore for the Sony PSP
Building the MIPS MSA module for non-fp64 targets fails with an LLVM
error. This commit blacklists PSP targets from MSA support in order to
fix building libcore.
2020-05-07 20:48:47 +01:00
Daniel Verkamp
d9a67ea922
Manually preserve rbx across cpuid instruction (#851)
* Manually preserve rbx across cpuid instruction

This fixes an issue observed when using __cpuid and __cpuid_count with
Address Sanitizer enabled: the generated code uses the rbx register to
access ASAN tracking information without reloading it after cpuid,
resulting in a segfault since the rbx register is overwritten by cpuid
(https://crbug.com/1072045).

This seems like a compiler backend bug, and indeed there is a
long-standing LLVM bug report about a very similar issue:
https://bugs.llvm.org/show_bug.cgi?id=17907

To work around this issue, we can manually preserve the rbx register
contents in the inline assembly.  This is the approach taken by LLVM's
own host cpuid detection code (lib/Host/Support.cpp).  The original rbx
value is stashed in rsi, which is then swapped with rbx to restore the
original value as well as keep the output ebx value from the CPUID
instruction to be used as an output of the inline assembly.

The rbx clobber is also removed; this seems ineffective, and it
conflicts with the ebx output of the inline assembly (ebx is a
subregister of rbx): "Note that clobbering named registers that are also
present in output constraints is not legal."
(https://llvm.org/docs/LangRef.html#clobber-constraints)

* Add link to LLVM bug in cpuid workaround comment
2020-04-29 01:50:13 +01:00
Amanieu d'Antras
1f32017c84 Rustfmt 2020-04-24 00:36:01 +01:00
Amanieu d'Antras
04c1a9a9e9
Use llvm_asm! instead of asm! (#846) 2020-04-09 00:05:10 +01:00
Heinz N. Gies
70f3623b52
Implement additional ARM NEON intriniscs (#792) 2020-04-07 20:06:38 +01:00
Linus Färnstrand
d7a1dbd509 Replace all std::<primitive>::MIN/MAX with just <primitive>::MIN/MAX 2020-04-04 09:51:11 -07:00
Linus Färnstrand
f14b746319 Replace all max/min_value() with MAX/MIN 2020-04-04 09:51:11 -07:00
Linus Färnstrand
e0533a30d3 Stop importing int/float modules 2020-04-04 09:51:11 -07:00
Makoto Kato
d5d3117b9b
Support crc32 even if on arm32 (#834)
CRC32 is supported on A32 and T32.
2020-03-30 16:38:23 +01:00
Linus Färnstrand
b852344de5
Replace module MIN/MAX and min/max_value() with assoc consts (#843) 2020-03-29 17:08:21 +01:00
Tyg13
9ab5dc0873
Remove unnecessary parens. (#839) 2020-01-30 13:15:36 +01:00
Luca Barbato
1601ce4f2f Add Icelake avx512 features (#838)
* Add Icelake avx512 features

As documented in https://software.intel.com/sites/default/files/managed/c5/15//architecture-instruction-set-extensions-programming-reference.pdf

* Sort the avx512 feature checks by bit

* Unbreak macos

Force nightly.
2020-01-26 13:10:29 -06:00
Yuki Okushi
c8c587d0cd Use issue = "none" instead of "0" 2019-12-27 11:25:13 +01:00
Oliver Scherer
43d49b6247 Update simd_llvm.rs 2019-12-20 23:31:51 +01:00
Oliver Scherer
5548609204 Add const unstability attributes
These are needed for rustc to be able to correctly handle stability of constness of intrinsics. Without either `rustc_const_unstable` or `rustc_const_stable` an intrinsic is not const evaluable at all.
2019-12-20 23:31:51 +01:00
bjorn3
c8249c76c4 Revert mmx changes
On i586 the simd_* intrinsics don't compile to MMX instructions, even
with `#[target_feature(enable = "mmx")]`.
2019-12-18 17:41:21 +01:00
bjorn3
ea51d868ec Rustfmt 2019-12-18 17:41:21 +01:00
bjorn3
0aa5e29724 Revert _mm_{min,max}_ps changes and add explanation why 2019-12-18 17:41:21 +01:00
bjorn3
2112972a64 Use <i64>::swap_bytes instead of llvm.bswap.i64 2019-12-18 17:41:21 +01:00
bjorn3
61693f3b53 Remove some unused llvm intrinsic declarations 2019-12-18 17:41:21 +01:00
bjorn3
c7e16bcebe Use <i32>::swap_bytes instead of llvm.bswap.i32 2019-12-18 17:41:21 +01:00
bjorn3
35fc3c36e3 Use simd_* in x86/avx2.rs where possible 2019-12-18 17:41:21 +01:00
bjorn3
fb84f79ce7 Use simd_* in x86/avx.rs where possible 2019-12-18 17:41:21 +01:00
bjorn3
c5572ec1f6 Use simd_* in x86/sse41.rs where possible 2019-12-18 17:41:21 +01:00