This commit is a replacement for #1417 now that rust-lang/rust#12046 has
landed. While I was here I went ahead and updated the Wasmtime used in
CI and adapted its command line as well.
These seem to have been introduced by recent LLVM changes.
* The instruction limit for vld*/vst* has been raised. This is not a
significant issue, it is only used for testing.
* vld*/vst* instructions are generated with overly strict alignments:
https://github.com/rust-lang/stdarch/issues/1217
* vtbl/vtbx instrinsics are failing intrinsic-test for unknown reasons.
This avoids a flood of warnings when testing the
armv7-unknown-linux-gnueabihf target.
Under this target, we would pass -Ctarget-features=+neon when building
intrinsic-test, but it is compiled for the host (and this tool doesn't
need Neon even if the host _is_ Armv7).
This also sets --target when running the 'hex' example, since that
seems more appropriate than always building it for the host.
This involves moving from the ACLE intrinsic definitions (which aren't
available for SVE at this point) to a JSON file. This was derived from
ARM's documentation[^1], and then relicensed under `MIT OR Apache-2.0` for
use in this repository.
[^1]: https://developer.arm.com/architectures/instruction-sets/intrinsics
This moves from the "dev" release of Wasmtime, used for its relaxed-simd
support, to an official release of Wasmtime just made which is the first
with relaxed-simd support.
This commit adds intrinsics to the `wasm32` to support the [relaxed SIMD
proposal][proposal]. These are added with the same naming conventions of
existing simd-related intrinsics for wasm which is similar to the
instruction name but matches sign in a few places.
This additionally updates Wasmtime to execute tests with support for the
relaxed simd proposal. No release has been made yet so this uses the
`dev` release, and I can make a PR in April when the support in Wasmtime
has been released to an official release. The `wasmprinter` crate is
also updated to understand these instruction opcodes as well.
Documentation has been added for all intrinsics, but tests have only
been added for some of them so far. I hope to follow-up later with more
tests.
[proposal]: https://github.com/WebAssembly/relaxed-simd
Wasmtime now supports all of the simd proposal, so this commit
uncomments instruction assertions and tests, while also adding more
tests, for all wasm simd instructions. This means that all wasm simd
instructions should be tested and have running instruction assertions,
except for `i64x2.abs`, which will require an LLVM upgrade to LLVM 13.
* Uncomment some i64-related instruction assertions now that LLVM
supports the opcodes.
* Fix the codegen for `{i,u}32x4_trunc_sat_f32x4`. This was originally
introduced using `simd_cast` but that inherits LLVM's UB related to
float-to-integer casts out of bounds. Since the original inception of
these intrinsics in LLVM dedicated intrinsics for the wasm
instructions have been added, so this swithces the implementation to
using those.
* Uncomment `f64x2_convert_low_i32x4` instruction assertion and add a
test now that this is implemented in Wasmtime.
While they're not very useful in single-threaded mode this makes them
more useful for building libraries because you don't have to always
recompile the standard library to get the desired effect. Additionally
it helps us enable tests on CI for these functions, since the
instructions will now validate without shared memory (thankfully!).
* Sync with the latest LLVM which has a few new intrinsic names
* Move explicit tests back to `assert_instr` since `assert_instr` now
supports specifying const-generic arguments inline.
* Enable tests where wasmtime implements the instruction as well as LLVM.
* Ensure there are tests for all functions that can be tested at this
time (those that aren't unimplemented in wasmtime).
There's still a number of `assert_instr` tests that are commented out.
These are either because they're unimplemented in wasmtime at the moment
or LLVM doesn't have an implementation for the instruction yet.
