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66 Commits

Author SHA1 Message Date
Oli Scherer
4519e68957 s/generator/coroutine/ 2023-10-20 21:14:01 +00:00
Oli Scherer
8e264ab07a s/Generator/Coroutine/ 2023-10-20 21:10:38 +00:00
bjorn3
e8168ce8a3 Merge commit '1eded3619d0e55d57521a259bf27a03906fdfad0' into sync_cg_clif-2023-07-22 2023-07-22 13:32:34 +00:00
bjorn3
81ea0b29ea Merge commit '8830dccd1d4c74f1f69b0d3bd982a3f1fcde5807' into sync_cg_clif-2023-06-15 2023-06-15 17:56:01 +00:00
bjorn3
8bf550e616 Merge commit 'ef07e8e60f994ec014d049a95591426fb92ebb79' into sync_cg_clif-2023-04-29 2023-04-29 12:00:43 +00:00
bjorn3
7b3bd56ed9 Merge commit 'dec0daa8f6d0a0e1c702f169abb6bf3eee198c67' into sync_cg_clif-2023-03-15 2023-03-15 14:41:48 +00:00
bjorn3
98a276b589 Merge commit '2bb3996244cf1b89878da9e39841e9f6bf061602' into sync_cg_clif-2022-12-14 2022-12-14 19:30:46 +01:00
Urgau
102a577bb3 Stabilize bench_black_box 2022-09-27 17:38:51 +02:00
bjorn3
640c3f730a Merge commit 'c19edfd71a1d0ddef86c2c67fdb40718d40a72b4' into sync_cg_clif-2022-07-25 2022-07-25 16:07:57 +02:00
bjorn3
32202f20cd Merge commit 'f2cdd4a78d89c009342197cf5844a21f8aa813df' into sync_cg_clif-2022-04-22 2022-04-22 21:11:38 +02:00
bjorn3
fb92375755 Merge commit '3a31c6d8272c14388a34622193baf553636fe470' into sync_cg_clif-2021-07-07 2021-07-07 11:14:20 +02:00
bjorn3
d6b03451e6 Merge commit '40dd3e2b7089b5e96714e064b731f6dbf17c61a9' into sync_cg_clif-2021-05-27 2021-05-27 13:08:14 +02:00
Erin Power
ee570b1302 Sync rustc_codegen_cranelift 'ddd4ce25535cf71203ba3700896131ce55fde795' 2021-04-30 14:49:58 +02:00
bjorn3
77f74ed070 Merge commit 'dbee13661efa269cb4cd57bb4c6b99a19732b484' into sync_cg_clif-2020-12-27 2020-12-27 10:30:38 +01:00
bjorn3
d404840788 Merge commit '5988bbd24aa87732bfa1d111ba00bcdaa22c481a' into sync_cg_clif-2020-11-27 2020-11-27 20:48:53 +01:00
bjorn3
285c7c66dc Merge commit '03f01bbe901d60b71cf2c5ec766aef5e532ab79d' into update_cg_clif-2020-11-01 2020-11-03 11:00:04 +01:00
bjorn3
ee2addd010 Don't test x86_64 simd on archs other than x86_64 2020-08-20 13:22:07 +02:00
bjorn3
c1a68b1386 Emulate the cpuid arch intrinsic 2020-08-15 19:08:19 +02:00
bjorn3
49b7fac443 Enable simd insert and extract tests 
Working since rust-lang/stdarch#876

Fixes #666
 2020-08-08 16:32:03 +02:00
bjorn3
edc0a3470b Implement simd_insert 2020-07-19 14:54:18 +02:00
bjorn3
e87651c3f2 Add test for SwitchInt on 128bit integers 2020-07-16 13:01:20 +02:00
bjorn3
8d639cd778 Test signed 128bit discriminants 2020-07-03 16:44:26 +02:00
bjorn3
5f54cc7658 Implement checked_mul 
Fixes #6
 2020-06-20 15:15:28 +02:00
bjorn3
ef4186a85b Use Cranelift legalization for icmp.i128 
The previous translation was wrong for signed 128bit comparisions

This fixes several libcore tests
 2020-06-20 13:23:31 +02:00
bjorn3
5c6bf836fe Implement #[link_section] 
Fixes #1047
 2020-06-20 12:01:24 +02:00
bjorn3
eab4c9063e Sync fn_sig_for_fn_abi with upstream for generator resume args 
Fixes #970
 2020-04-18 15:45:42 +02:00
bjorn3
9ab2af56aa Rustup to rustc 1.43.0-nightly (4ad624882 2020-03-03) 2020-03-04 15:04:28 +01:00
bjorn3
c8de552c01 Tls support 2020-02-26 14:41:05 +01:00
bjorn3
e9d3569e08 Run libcore tests 2019-11-24 15:44:39 +01:00
bjorn3
b0bcb23eb4 Fix signed cast to 128bit integer 2019-11-16 16:44:26 +01:00
bjorn3
5407b51aa7 Rustup to rustc 1.40.0-nightly (9e346646e 2019-11-08) 2019-11-09 11:14:18 +01:00
bjorn3
1f90b04cd6 Fix float -> u/i128 cast 
The original test casts were optimized away by rustc,
so cg_clif never saw them.

cc #668
 2019-08-21 14:35:48 +02:00
bjorn3
b2d6705fe2 Implement u/i128 <-> float casts 
Fixes #668
 2019-08-21 14:01:29 +02:00
bjorn3
3fcd54088c Implement saturating_{add,sub} intrinsics 2019-08-20 10:40:08 +02:00
bjorn3
f99d31dbfe Implement pow{f32,f64} intrinsics 2019-08-19 17:16:21 +02:00
bjorn3
edbb5730ea Implement copysign{f32,f64} intrinsics 2019-08-19 16:27:09 +02:00
bjorn3
2558bf2f6b Workaround for missing #[rustc_args_required_const(..)] support 
cc #666
 2019-08-16 16:04:50 +02:00
bjorn3
9505d60a24 Cast rhs to lhs type for shl and shr 2019-08-14 15:18:05 +02:00
bjorn3
f5b0a68fbf Fix some warnings 2019-08-12 16:00:10 +02:00
bjorn3
314141392a Implement log2{f32,f64} intrinsics 2019-08-12 15:54:24 +02:00
bjorn3
7602a46bb9 Implement simd_extract 2019-08-05 16:28:27 +02:00
bjorn3
2f0093b8c2 Test mutex locking 2019-08-01 11:15:40 +02:00
bjorn3
b806070a88 Fix simd_cast 2019-07-31 09:46:05 +02:00
bjorn3
69526d464f Implement some float simd intrinsics 2019-07-30 14:37:20 +02:00
bjorn3
ee4927e069 Fix _mm_movemask_epi8 
The order of iteration was wrong
 2019-07-29 18:59:17 +02:00
bjorn3
63646b1956 Implement llvm.x86.avx2.pmovmskb llvm intrinsic 2019-07-29 12:50:20 +02:00
bjorn3
9cb787fe70 Implement and test simd_shuffle* 2019-07-29 11:23:53 +02:00
bjorn3
76b89476c3 [WIP] simd_shuffle* 2019-07-29 11:03:55 +02:00
bjorn3
90f2b12d47 Fix simd comparison 2019-07-29 11:03:55 +02:00
bjorn3
7fdd058c60 Emulate some simd intrinsics 2019-07-29 11:03:55 +02:00