2315 Commits

Author SHA1 Message Date
bendn
2f742148e1 hmm 2025-04-11 11:30:32 +00:00
bendn
b5046525d5 fix broken intra doc links 2025-04-11 11:30:32 +00:00
sayantn
a721b3ec29 Disable cfg check for the recently-merged target features to allow stdarch update 2025-04-10 11:47:18 +00:00
sayantn
fbd13bd08c Add feature detection for new amx variants and movrs 2025-04-07 21:29:15 +00:00
sayantn
97606212ea Update SDE to 9.53.0 2025-04-07 21:29:15 +00:00
Tsukasa OI
6e4ad9cc18 RISC-V: check cfg (batch 1)
rust-lang/rust#138823 added five new extensions as compiler target features.
This commit reflects that fact and now checks static target features on
`std::arch::is_riscv_feature_detected!` as well.

*   "Zicsr"
*   "Zicntr"
*   "Zihpm"
*   "Zifencei"
*   "Zihintpause"
2025-04-06 13:27:52 +00:00
bendn
3ea2e5600f allow unnecessary transmutes 2025-03-27 21:36:07 +00:00
Taiki Endo
5b9cdf26df std_detect: Move cfgs into getauxval helper function 2025-03-26 13:55:33 +00:00
Taiki Endo
0965a880c2 std_detect: Always avoid dlsym on *-linux-{musl,ohos}* targets 2025-03-26 13:55:33 +00:00
Folkert de Vries
9c8f736849 make documentation headers consistent
this now always uses the name as specified by the official docs
2025-03-26 13:50:38 +00:00
Folkert de Vries
69a7cb8be3 add s390x to the module docs 2025-03-26 13:50:38 +00:00
James Barford-Evans
2099eccb2e pr feedback - remove the commented out vcombine_f16 2025-03-25 10:53:54 +00:00
James Barford-Evans
08b9752ee1 refactor - arm_shared intrinsics are now YAML, where possible use anchor
tags
2025-03-25 10:53:54 +00:00
Tsukasa OI
55fbe86255 tentatively remove the "B" RISC-V extension from the documentation
Although the "B" extension is redefined and ratified, keeping this in the
documentation as-is have two issues:

*   "B" extension is not added to `riscv.rs` yet (to be added later).
*   "B" extension is ratified as a combination of "Zba", "Zbb" and "Zbs"
    extensions and "Zbc" is *not* a part of "B" itself (despite that
    it is listed under "B"), which makes the documentation misleading.

This commit tentatively removes the reference to the "B" extension and
replaced with "Bit Manipulation Extensions" without an extension name.
2025-03-24 23:47:00 +00:00
Tsukasa OI
1c6d764b0b reword RISC-V feature documentation
As the version 20240411 of the RISC-V ISA Manual changed wording to
describe many of the standard extensions, this commit largely follows this
scheme in general.  In many cases, words "Standard Extension" are replaced
with "Extension" following the latest ratified ISA Manual.

Some RISC-V extensions had tentative summary but it also fixes that
(e.g. "Zihintpause").

Following extensions are described in parity with corresponding extensions
using floating-point registers:

*   "Zfinx" Extension for Single-Precision Floating-Point in Integer Registers
*   "Zdinx" Extension for Double-Precision Floating-Point in Integer Registers
*   "Zhinx" Extension for Half-Precision Floating-Point in Integer Registers
*   "Zhinxmin" Extension for Minimal Half-Precision Floating-Point in Integer Registers

Following extensions are named against the ISA Manual naming but
considered inconsistency inside the ISA manual:

*   "Zfhmin" Extension for Minimal Half-Precision Floating-Point
    ISA Manual: "Zfhmin" Standard Extension for Minimal Half-Precision Floating-Point
*   "V" Extension for Vector Operations
    ISA Manual: "V" Standard Extension for Vector Operations

Following extension is removed from the latest ratified ISA Manual but
named like others:

*   "Zam" Extension for Misaligned Atomics

"Zb*" extensions are described like "Extension for ..." using partial
summary per extension (including cryptography-related "Zbk*" extensions).

"Zk*" extensions are described like "Cryptography Extension for ..." using
partial summary per extension (e.g. 'Zkne - NIST Suite: AES Encryption' in
the ISA Manual to '"Zkne" Cryptography Extension for NIST Suite: AES
Encryption') except following extensions:

*   "Zkr" Entropy Source Extension
    Following the general rule will make the description redundant.
*   "Zk" Cryptography Extension for Standard scalar cryptography
    The last word "extension" is removed as seemed redundant.

Link:

<https://lf-riscv.atlassian.net/wiki/spaces/HOME/pages/16154769/RISC-V+Technical+Specifications>
(ISA Specifications, Version 20240411; published in May 2024)
2025-03-24 23:47:00 +00:00
Tsukasa OI
14fc81b85f reorder all RISC-V features for maintenance
All RISC-V Features are reordered for better maintainability.
The author has a plan to add many RISC-V ratified extensions (mainly
discoverable from Linux) and this is a part of preparation.

Sections are divided as follows:

*   Base ISAs
*   "I"-related
    *   Extensions formerly a part of the base "I" extension
        but divided later (now all of them are ratified).
    *   Other user-mode extensions "Zi*".
*   "M"-related (currently "M" only)
*   "A"-related
    "A", "Za*" and "Ztso" which is named differently but absolutely
    related to memory operations.
*   Base FP extensions
*   Base FP extensions using integer registers
*   "C"-related (currently "C" only)
*   "B"-related (except cryptography-related "Zbk*")
*   Scalar cryptography extensions (including "Zbk*")
*   Base Vector extensions (currently "V" only)
*   Ratified privileged extensions
*   Non-extensions and non-ratified extensions which is *not*
    going to be ratified, at least in the draft form

The last section needs some explanation.

"S" is not an extension (although some buggy implementations such as QEMU
up to 7.0 emitted this character as well as "U" as an extension) and the
DeviceTree parser in the Linux kernel explicitly workarounds this issue.

There's no plan for ratification of the single-letter "J" extension
(there's a room for redefinition like the "B" extension but unlikely).
Instead, pointer masking extensions including "Supm" is one of the results
of the task group discussing J extension*s*.
There's also an instruction in the "Zfa" extension which accelerates
FP-to-int conversion matching JavaScript semantics.

"P" is being actively discussed (and will result in a single-letter "P"
extension and various "Zp*" extensions) but it seems there needs some time
until ratification.
And there's one Rust-specific issue: Rust implements Packed-SIMD intrinsics
based on an early draft of the "P" extension and they are *very unlikely*
kept as-is.  For instance, `add16` does not follow standard RISC-V
instruction naming (ADD16 is the name from the Andes' proposal) and
going to be renamed.

Before moving "P" to above, we have to clearly understand what the final
"P" extension will be and resolve existing intrinsics.
2025-03-24 23:47:00 +00:00
Tsukasa OI
5feb3c989e resolve clippy::doc_lazy_continuation
This commit adds indentation as suggested by the Clippy warning.
2025-03-24 23:27:46 +00:00
Tsukasa OI
be20f62a20 silence clippy::eq_op while checking
This error occurs when the RISC-V "A" Extension is being tested.
2025-03-24 23:27:31 +00:00
Vadim Petrochenkov
ebe8804680 sse42: Add unsafe blocks around unsafe function calls
to fix the `unsafe_op_in_unsafe_fn` lint
2025-03-24 23:26:29 +00:00
David Pathakjee
a083e2a6c8 Minor correction to __m512d documentation.
A 512-bit register is f64x8, not f64x4. Likely a copy-paste error from the _m256d documentation,
which seems correct.
2025-03-24 23:26:12 +00:00
Taiki Endo
1c136ddc5a std_detect: Support detecting more features on AArch64 Windows 2025-03-24 23:25:59 +00:00
sayantn
a9135c1634 Temporary fix: change the feature gate of VEX variants 2025-03-24 23:23:59 +00:00
Ralf Jung
a03fdf1441 use consistent wording around the 'undefined' intrinsics, and slightly expand their docs 2025-03-20 22:51:52 +00:00
WANG Rui
ad03413c39 std_detect: Add target features for LoongArch v1.1 2025-03-20 22:26:36 +00:00
Tsukasa OI
c0fc23f2d8 Fix: stabilized version of RISC-V feature macro
RISC-V runtime feature detection macro is stabilized on Rust 1.78.0,
not Rust 1.76.0.
2025-03-20 21:54:50 +00:00
WANG Rui
14ddd423fb Incldue loongarch64 in the list of other architectures 2025-03-20 21:54:32 +00:00
Folkert de Vries
81f6100463 move unsafe pointer writes to the surface 2025-03-16 20:02:22 +00:00
Folkert de Vries
1f202e7fe7 shink the size of type signatures 2025-03-16 20:02:22 +00:00
Folkert de Vries
3b8973d216 add vec_meadd, vec_moadd, vec_mhadd and vec_mladd 2025-03-16 20:02:22 +00:00
Folkert de Vries
44cda131be add vec_mulh 2025-03-16 20:02:22 +00:00
Folkert de Vries
f7dc654108 add vec_mulo 2025-03-16 20:02:22 +00:00
Folkert de Vries
5c61b664e7 add vec_any_* and vec_all_* 2025-03-16 20:02:22 +00:00
Folkert de Vries
e30905984c add vec_all_nan, vec_any_nan, vec_all_numeric and vec_any_numeric 2025-03-16 20:02:22 +00:00
Folkert de Vries
2667fd06ff add vec_cmpeq_idx and variations 2025-03-16 20:02:22 +00:00
Folkert de Vries
b866e43594 add vec_cmpeq and vec_cmpne 2025-03-16 20:02:22 +00:00
Folkert de Vries
8affaabfaf add vec_cmpgt, vec_cmplt, vec_cmpge, vec_cmple 2025-03-16 20:02:22 +00:00
Folkert de Vries
81a2841164 let's not use &mut until we get confirmation it's OK 2025-03-16 20:02:22 +00:00
Folkert de Vries
d218bd1624 add vec_cmprg_or_0_idx_cc and vec_cmpnrg_or_0_idx_cc 2025-03-16 20:02:22 +00:00
Folkert de Vries
790d77e4e6 add vec_cmprg_or_0_idx and vec_cmpnrg_or_0_idx 2025-03-16 20:02:22 +00:00
Folkert de Vries
3660dfff5a add vec_cmprg_cc and friends 2025-03-16 20:02:22 +00:00
Folkert de Vries
895d11f085 add vec_cmprg_idx and vec_cmpnrg_idx 2025-03-16 20:02:22 +00:00
Folkert de Vries
511a8eb3cd add vec_cmpnrg 2025-03-16 20:02:22 +00:00
Folkert de Vries
edbeee5b25 add vec_cmprg 2025-03-16 20:02:22 +00:00
Folkert de Vries
b4b126edfc add vec_sld, vec_sldb, vec_sldw and vec_srdb 2025-03-16 20:02:22 +00:00
Folkert de Vries
239f240515 add vec_msum_u128 2025-03-16 20:02:22 +00:00
Folkert de Vries
0c011430d9 add vec_cp_until_zero and vec_cp_until_zero_cc 2025-03-16 20:02:22 +00:00
Folkert de Vries
efe09e0c85 add vec_signed and vec_unsigned 2025-03-16 20:02:22 +00:00
Folkert de Vries
c29266a029 add vec_extend_s64 2025-03-16 20:02:22 +00:00
Folkert de Vries
68b9d71cb8 add vec_double and vec_float 2025-03-16 20:02:22 +00:00
Folkert de Vries
d4c98b0930 add vec_search_string_cc and vec_search_string_until_zero_cc 2025-03-16 20:02:22 +00:00