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1846 Commits

Author SHA1 Message Date
Tsukasa OI
7168d48c0b stdarch-gen-arm: Modernization of the coding style 
It modernizes the coding style of the crate stdarch-gen-arm by fixing
Clippy warnings (except clippy::{collapsible_if,obfuscated_if_else} that
might make the program look worse as a result of "fixing" warnings).

Clippy: rust version 1.89.0-nightly (6f6971078 2025-05-28)
Number of Fixed Warnings: 84/84
Note:
Rust Analyzer double counts one of the Clippy warnings so it reduces
85 warnings (as reported by the Rust Analyzer).

This commit also applies similar technique used to resolve Clippy
warnings but also simplifies identifier name formatting and makes
reading easier.

Confirmed that the exact same code will be generated.
 2025-05-31 09:38:49 +00:00
Tsukasa OI
7a074c14a1 RISC-V: Linux: Imply Zicntr from the IMA base behavior 
As the author confirmed as in:
<https://lists.infradead.org/pipermail/linux-riscv/2025-May/070844.html>,
runtime detection of the Zicntr extension (as in the Linux kernel 6.15)
is currently (and technically) redundant on the current base IMA behavior
(although can be meaningful if new base behavior is added).

This commit implies the Zicntr extension from the base IMA behavior.
 2025-05-30 21:09:38 +00:00
sayantn
5984f7c61d Add back std_detect_env_override 2025-05-30 18:04:16 +00:00
sayantn
cd63f26d86 Upgrade more intrinsics to the new version 2025-05-30 18:02:17 +00:00
sayantn
3de76d47a2 Use the new definition of rdtscp intrinsic 
- add `-Zverify-llvm-ir` in testsuite
 2025-05-30 18:02:17 +00:00
sayantn
28960ece72 Fix s390x intrinsics 
- use correct intrinsic for unpackl
 - fix invalid use of `simd_{or,and,xor}` on floating point vectors
 - `vec_search_string` should require `vector-enhancements-2`
 2025-05-30 18:02:17 +00:00
sayantn
7afd613941 Fix PPC shift and rotate intrinsics 2025-05-30 18:02:17 +00:00
sayantn
79654521ee Fix ldpte and lddir signature 
- The 2nd argument of the LLVM intrinsic should be IMMARG
 2025-05-30 18:02:17 +00:00
usamoi
a4a7184370 mark gfni, vaes, vpclmulqdq intrinsics as safe 2025-05-30 17:35:18 +00:00
Ralf Jung
9561e8e0a3 cmpxchg16b: use atomic_compare_exchange from libcore 2025-05-30 17:14:51 +00:00
Tsukasa OI
87b28d4885 Check cfg on features that stage0 compiler support 
Since the bootstrap compiler of Rust is bumped to the commit
5dadfd5c417f0b66816cb7ca662859e2c8751fb3 (version 1.88.0-beta.3 2025-05-11),
some features should be safe to enable cfg checks.

RISC-V Features:

*   "zicsr"
*   "zicntr"
*   "zihpm"
*   "zifencei"
*   "zihintntl"
*   "zihintpause"
*   "zimop"
*   "zicboz"
*   "zicond"
*   "ztso"
*   "zfa"
*   "zca"
*   "zcb"
*   "zcmop"
*   "b"

x86 Features:

*   "amx-avx512"
*   "amx-fp8"
*   "amx-movrs"
*   "amx-tf32"
*   "amx-transpose"
 2025-05-30 16:30:09 +00:00
Madhav Madhusoodanan
3e74af11f3 fix: code cleanup and renaming 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
d8469bea64 fix: moved common code (that required no architecture-specific 
modifications) outside the IntrinsicDefinition trait
 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
54e277cdd5 fix: moved f16 formatting code to common module 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
57006ad521 Fix: removed BaseIntrinsicTypeDefinition + code cleanup 
1. Removed default implementation of traits that are compulsorily
implemented
2. Replaced BaseIntrinsicTypeDefinition with Deref<Target =
IntrinsicType>
 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
6de5b7bef8 feat: merging changes related to f16 formatting 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
2a5e678a84 moved more code generation functionality to common 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
c01c6ceb87 fix: aarch64_be issues wthin compilation 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
9b4768921f feat: made constraint common 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
86f23a6c2a chore: file renaming 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
a416e3ea11 code cleanup 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
8d0141ee19 Added dynamic dispatch for easier management of <arch>ArchitectureTest structs 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
587d8cebda moved the C compilation commands into a struct for easier handling 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
445137ad13 Removed aarch64-be specific execution command for rust test files 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
add7b2e402 renamed a64_only data member in Intrinsic to arch_tags 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
f05ffd4a0b Added a macro to simplify <Arch>IntrinsicType definitions 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
57c357591e introduced generic types and code refactor 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
a993b4427c Updated Argument::from_c to remove ArgPrep specific argument 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
9d3c09ed53 added target field within IntrinsicType to perform target level checking cleanly 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
9927915e58 test commit to check if load_Values_c can be dissociated from target logic 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
bb1dfa0276 rename struct for naming consistency 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
8e269afcfe maintaining special list of targets which need different execution command 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
e15d6fae92 fixed too many files open issue 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
ca67119d5f chore: added match block in src/main.rs 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
c862432cfd chore: code consolidation 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
17277d71e8 chore: separated common logic within file creations, compile_c, compile_rust and compare_outputs 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
8cb9183221 chore: Added ProcessedCli to extract the logic to pre-process CLI struct args 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
1d39fd0964 Chore: Added SupportedArchitectureTest trait which must be implemented for different architectures. 
Next steps:
Move the existing ARM-specific implementation into one that fits well with this trait.
 2025-05-27 23:27:38 +00:00
Madhav Madhusoodanan
d7edb3ea7c Feat: Moved majority of the code to arm module. 
Reasoning:
1. Majority of code assumes the usage of `Intrinsic` and related types, which is derived from the JSON structure of the ARM intrinsics JSON source file
2. Further commits will start with extracting common parts of the code (eg: Create C/Rust file, Build C/Rust file, etc)
 2025-05-27 23:27:38 +00:00
Tsukasa OI
08484b5e7a std_detect: RISC-V platform guide documentation (non-table part) 
This is a partial revert of a revert, making the
commit e907456b2e10622ccd854a3bba8d02ce170b5dbb come around again
for non-table part.
 2025-05-26 20:07:17 +00:00
Ralf Jung
b58ce625a2 allow aarch64_softfloat_neon for backwards compatibility 2025-05-21 10:39:23 +00:00
Folkert de Vries
7b995254d4 use a tuple to return the condition code 2025-05-20 16:39:24 +00:00
Folkert de Vries
4f35c02aa0 in intrinsic-test, format f16 like C 2025-05-20 14:26:46 +00:00
Folkert de Vries
42e6ad3ee8 use the right load instruction 2025-05-20 14:26:46 +00:00
Folkert de Vries
a850e8738a avx512_target_feature is now stable on nightly 2025-05-20 14:26:46 +00:00
sayantn
806848f01e Correct rustc version for the stabilization of runtime detection of VEX variants of avx512 2025-05-17 17:43:54 +00:00
sayantn
98c4ba9783 Stabilize runtime detection of VEX variants of avx512 2025-05-17 09:48:33 +00:00
WANG Rui
63235a6ba5 Partially stabilize LoongArch target features 2025-05-12 19:47:49 +00:00
sayantn
546e26518f Run aarch64-pc-windows-msvc runs on the new windows-11-arm runners 2025-05-06 16:10:50 +00:00
sayantn
949fd567f3 Edit macro_trailing_commas to enable tests in all architectures 2025-05-06 16:10:50 +00:00