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1108 Commits

Author SHA1 Message Date
Amanieu d'Antras
5f29166d6a Add tracking issue for RISC-V intrinsics 2023-10-29 20:39:50 +01:00
Amanieu d'Antras
3243b5b41f Revert accidental stabilization of _mm512_storeu_ps 2023-10-29 20:39:50 +01:00
Amanieu d'Antras
ef968b89fe Add tracking issue on has_cpuid 2023-10-29 20:39:50 +01:00
Amanieu d'Antras
3c7af52600 Add stability attributes on x86 re-exports 2023-10-29 20:39:50 +01:00
Amanieu d'Antras
7c238335ea Add tracking issue for RTM 2023-10-29 20:39:50 +01:00
Amanieu d'Antras
ca55a52eba Add tracking issue for AVX-512 2023-10-29 20:39:50 +01:00
Amanieu d'Antras
7f5fd0955a Disable NEON intrinsics on big-endian ARM 
These are currently broken because the order of elements inside
vectors is reversed on big-endian systems: the ARM ABI requires that
element 0 is located at the highest address of the vector type. However
LLVM intrinsics expect element 0 to be located at the lowest address.

See https://llvm.org/docs/BigEndianNEON.html and `arm_neon.h` in
Clang for more details.

Although this is a breaking change, this is acceptable for 2 reasons:
- big endian ARM targets are only tier 3.
- it is preferable to stop existing code from compiling than to let it
run and produce incorrect results.
 2023-10-21 16:29:18 +02:00
Eduardo Sánchez Muñoz
45f28923ce Fix UB in _mm_movemask_ps, _mm_movemask_pd, _mm256_movemask_ps and _mm256_movemask_pd 
The `simd_bitmask` intrinsic requires each element to be all-1 or all-0, while the x86 functions only check for the highest bit.
 2023-10-12 08:37:29 +02:00
Eduardo Sánchez Muñoz
b2c5bc9696 Remove unneeded transmutes 
(or replace them with safe versions)
 2023-10-11 18:11:51 +02:00
Eduardo Sánchez Muñoz
7808ffa5af Reimplement _mm256_movemask_ps and _mm256_movemask_pd without LLVM intrinsics 2023-10-10 14:48:55 +01:00
Eduardo Sánchez Muñoz
b886dade6f Reimplement _mm_movemask_ps and _mm_movemask_pd without LLVM intrinsics 2023-10-10 14:48:55 +01:00
Eduardo Sánchez Muñoz
5c20a68339 Reimplement _mm256_addsub_ps and _mm256_addsub_pd without LLVM intrinsics 2023-10-10 14:48:55 +01:00
Eduardo Sánchez Muñoz
388f05debc Reimplement _mm_addsub_ps and _mm_addsub_pd without LLVM intrinsics 2023-10-10 14:48:55 +01:00
Eduardo Sánchez Muñoz
b0726bac9c Reimplement _mm_blend_pd and _mm_blend_ps without LLVM intrinsics 2023-10-10 14:48:55 +01:00
Eduardo Sánchez Muñoz
cab7166474 Reimplement _mm_blendv_ps and _mm256_blendv_ps without LLVM intrinsics 2023-10-10 14:48:55 +01:00
Eduardo Sánchez Muñoz
2534365aee Reimplement _mm_blendv_pd and _mm256_blendv_pd without LLVM intrinsics 2023-10-10 14:48:55 +01:00
Eduardo Sánchez Muñoz
81b0d7f279 Reimplement _mm_blend_epi16 without LLVM intrinsics 2023-10-10 14:48:55 +01:00
Eduardo Sánchez Muñoz
2a63cfea9e Reimplement _mm_blendv_epi8 and _mm256_blendv_epi8 without LLVM intrinsics 2023-10-10 14:48:55 +01:00
Eduardo Sánchez Muñoz
fd694451fe Reimplement _mm_mul_epi32 and _mm256_mul_epi32 without LLVM intrinsics 2023-10-10 14:48:55 +01:00
Eduardo Sánchez Muñoz
387c45ae16 Reimplement _mm_avg_epu8, _mm_avg_epu16, _mm256_avg_epu8 and _mm256_avg_epu16 without LLVM intrinsics 2023-10-10 14:48:55 +01:00
Eduardo Sánchez Muñoz
e4363c287d Reimplement _mm_mulhi_epi16, _mm_mulhi_epu16, _mm256_mulhi_epi16 and _mm256_mulhi_epu16 without LLVM intrinsics 2023-10-10 14:48:55 +01:00
Eduardo Sánchez Muñoz
507391d2c8 Reimplement _mm_mul_epu32 and _mm256_mul_epu32 without LLVM intrinsics 2023-10-10 14:48:55 +01:00
Eduardo Sánchez Muñoz
6baf6bf473 Reimplement _mm_cvtpd_ps and _mm_cvtps_pd without LLVM intrinsics 2023-10-10 14:48:55 +01:00
Eduardo Sánchez Muñoz
d875917e96 Reimplement _mm_cvtepi32_ps without LLVM intrinsics 2023-10-10 14:48:55 +01:00
Eduardo Sánchez Muñoz
8950416e20 Bump wasmprinter to 0.2.67 2023-10-10 14:47:43 +01:00
Eduardo Sánchez Muñoz
07bbe62ccb Bump itertools to 0.11 2023-10-10 14:47:43 +01:00
Eduardo Sánchez Muñoz
a4cb14940f Bump pretty_env_logger to 0.5 2023-10-10 14:47:43 +01:00
Eduardo Sánchez Muñoz
eef659efee Bump clap to 4.4 
Also define args with derive style instead of builder style.
 2023-10-10 14:47:43 +01:00
Eduardo Sánchez Muñoz
6698a597c0 Bump serde-xml-rs to 0.6 2023-10-10 14:47:43 +01:00
Eduardo Sánchez Muñoz
690cd51e5a Bump syn to 2.0 
Also ensure that `assert_instr` attribute has been correctly parsed in stdarch-verify.
 2023-10-10 14:47:43 +01:00
bjorn3
6f33e9c36b Remove use of auv crate from tests 2023-10-10 14:38:20 +01:00
bjorn3
d1df958a32 Remove the auxv dev dependency. 
It hasn't been used since roughly 2018. The latest published version of
auxv has a less common license and doesn't specify any license in it's
Cargo.toml file.
 2023-10-10 14:38:20 +01:00
Eduardo Sánchez Muñoz
11a5eab3e6 Bump _mm_getcsr/_mm_setcsr deprecation Rust version to 1.75 2023-10-02 22:09:17 +01:00
Eduardo Sánchez Muñoz
02bdadb2ae Add parentheses to avoid (re)parsing ambiguity in test_vsri macro. 2023-10-02 21:29:51 +01:00
Eduardo Sánchez Muñoz
95d83fd436 Add #[cfg_attr(miri, ignore)] to SSE and SSE2 that cannot be supported by Miri 2023-10-02 21:29:51 +01:00
Eduardo Sánchez Muñoz
41dc4aad89 Support adding attributes to simd_test tests 
It uses the syn crate to parse the function, so the name can now be extracted without the `find_name` helper.
 2023-10-02 21:29:51 +01:00
Eduardo Sánchez Muñoz
b8b79f2e7a Avoid subtraction overflow in test_mm_store{,1,r}_ps functions 
This overflow was found while testing core_arch with miri
 2023-10-02 21:29:51 +01:00
Eduardo Sánchez Muñoz
fe8004cd5e Use assert_approx_eq! in test_mm_rcp_ss 
Like done in `test_mm_rcp_ps`, but only for the first element.
 2023-10-02 21:29:51 +01:00
Eduardo Sánchez Muñoz
30a663b4ac Add some #[allow(deprecated)] 2023-10-01 17:57:00 +01:00
Eduardo Sánchez Muñoz
83668823fd Remove references to _mm_getcsr or _mm_setcsr in other function's docs 2023-10-01 17:57:00 +01:00
Eduardo Sánchez Muñoz
a601d109b4 Deprecate functions that use _mm_getcsr or _mm_setcsr 2023-10-01 17:57:00 +01:00
Ralf Jung
5acb9a26e7 deprecate _mm_getcsr and _mm_setcsr 2023-09-29 09:45:50 +01:00
Ralf Jung
08652d6d6b another typo 2023-09-29 09:45:50 +01:00
Ralf Jung
7d5ffdffd7 fix typo 
Co-authored-by: Jacob Lifshay <programmerjake@gmail.com>
 2023-09-29 09:45:50 +01:00
Ralf Jung
06f5033e50 Rust does not let you observe or mutate the floating-point register in well-defined ways 2023-09-29 09:45:50 +01:00
Taiki Endo
059b848b8a core_arch: Fix ARMv6 CP15 barrier 2023-09-29 09:10:33 +01:00
Gijs Burghoorn
73a820bc6b Add missing aes64im of RISC-V Zk extension 2023-09-25 10:36:24 +08:00
Gijs Burghoorn
0d56394f35 Fix: #1464 for rv64 zb 2023-09-22 10:08:56 +08:00
Gijs Burghoorn
8a23f93e8b Fix: #1464 for rv64 zk 2023-09-22 10:08:56 +08:00
Eduardo Sánchez Muñoz
bc7c676407 Format 2023-09-22 10:07:29 +08:00